JAJSNR7E May   2008  – July 2024 LMH6518

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Preamplifier
        1. 6.3.1.1 Primary Output Amplifier
        2. 6.3.1.2 Auxiliary Amplifier
      2. 6.3.2 Overvoltage Clamp
      3. 6.3.3 Attenuator
      4. 6.3.4 Digital Control Block
    4. 6.4 Device Functional Modes
      1. 6.4.1 Primary Amplifier
      2. 6.4.2 Auxiliary Output
    5. 6.5 Programming
      1. 6.5.1 Logic Functions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Oscilloscope Front End
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Settings and ADC SPI Code (ECM)
          2. 7.2.1.2.2 Input and Output Considerations
            1. 7.2.1.2.2.1 Output Swing, Clamping, and Operation Beyond Full Scale
          3. 7.2.1.2.3 Oscilloscope Trigger Applications
        3. 7.2.1.3 Application Curves
      2. 7.2.2 JFET LNA Implementation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Attenuator Design
        3. 7.2.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報
7.2.1.2.2 Input and Output Considerations

The LMH6518 ideal input and output conditions, considered individually, are listed in Table 7-2.

Table 7-2 LMH6518 Ideal Input and Output Conditions
IMPEDANCE FROM EACH INPUT TO GROUND (Ω) COMMON MODE INPUT (V) DIFFERENTIAL INPUT (VPP) LOAD IMPEDANCE (Ω) DIFFERENTIAL OUTPUT (V) COMMON MODE OUTPUT (V)
≤50 1.5 to 3.1 < 0.8 100 (differential) and
50 (single-ended)		 < 0.77 0.95 to 1.45

In addition to the individual conditions listed in Table 7-2, the input and output terminal conditions must match differentially (that is, +IN to −IN and +OUT to −OUT), as well, for best performance.

The input is differential but is driven single-ended as long as the conditions of Table 7-2 are met, and there is good matching between the driven and undriven inputs from DC to the highest frequency of interest. If not, there is a settling time impact among other possible performance degradations. The data-sheet specifications are with single-ended input, unless specified. Figure 7-4 is the recommended bench-test schematic to drive one input and to bias the other input with good matching in mind.

LMH6518 Recommended Single-Ended Bench-Test Input Drive from 50-Ω SourceFigure 7-4 Recommended Single-Ended Bench-Test Input Drive from 50-Ω Source

With Figure 7-4, each LMH6518 input sees 25-Ω to ground at higher frequencies when the capacitors look like shorts. This impedance increases to 125-Ω at DC for both inputs, thereby preserving the required matching at any frequency. This configuration, using properly selected R’s and C’s, allows four times less biasing power dissipation than when undriven inputs are biased with an effective 25-Ω from the LMH6518 input to ground.

Driving the LMH6518 input from a ground-referenced, 50-Ω source is possible by providing level shift circuitry on the driven input. Figure 7-5 shows a circuit where half the input signal reaches the LMH6518 input, while the negative supply voltage (VEE) prevents biasing current on the 50-Ω source at J1 while providing 50-Ω termination to the source. The driven input (+IN) is biased to 2.5-V (VCC/2) in Figure 7-5.

LMH6518 LMH6518 Driven by a Ground-Referenced SourceFigure 7-5 LMH6518 Driven by a Ground-Referenced Source

In Figure 7-5, the equivalent impedance from each LMH6518 input to ground is around 38-Ω. The power consumption of this configuration is approximately 0.5 W (in R1 – R5) which is higher than that of Figure 7-4 because of additional power dissipated to perform the level shifting. Additional 50-Ω attenuators is placed between J1 and R2/R3 junction in Figure 7-5 to accommodate higher input voltages.

Shifting the LMH6518 output common mode level is also possible by using a level shift approach similar to that of Figure 7-5. The circuit in Figure 7-6 shows an implementation where the LMH6518 nominal 1.2-V CM output, set by a 1.2-V on VCM input from the GSPS ADC, is shifted lower for proper interface to different ADCs (which require VCM = 0-V and have high input impedance).

LMH6518 Output CM Shift Scheme Figure 7-6 Output CM Shift Scheme

In Figure 7-6, Vx is kept at 1.2-V by proper selection of external resistor values, so that the LMH6518 outputs are not CM-loaded. As was the case with input level shifting, this output-level shifting also consumes additional power (0.58 W).