JAJSNR7E May   2008  – July 2024 LMH6518

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Preamplifier
        1. 6.3.1.1 Primary Output Amplifier
        2. 6.3.1.2 Auxiliary Amplifier
      2. 6.3.2 Overvoltage Clamp
      3. 6.3.3 Attenuator
      4. 6.3.4 Digital Control Block
    4. 6.4 Device Functional Modes
      1. 6.4.1 Primary Amplifier
      2. 6.4.2 Auxiliary Output
    5. 6.5 Programming
      1. 6.5.1 Logic Functions
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Oscilloscope Front End
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Settings and ADC SPI Code (ECM)
          2. 7.2.1.2.2 Input and Output Considerations
            1. 7.2.1.2.2.1 Output Swing, Clamping, and Operation Beyond Full Scale
          3. 7.2.1.2.3 Oscilloscope Trigger Applications
        3. 7.2.1.3 Application Curves
      2. 7.2.2 JFET LNA Implementation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Attenuator Design
        3. 7.2.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Logic Functions

The following LMH6518 functions are controlled using the SPI-compatible bus:

  • Filters (20 MHz, 100 MHz, 200 MHz, 350 MHz, 650 MHz, 750 MHz, or full bandwidth)
  • Power mode (full power or auxiliary high impedance, Hi-Z)
  • Preamp (HG or LG)
  • Attenuation ladder (0 dB to 20 dB, 10 states)
  • LMH6518 state write or read back

The SPI bus uses 3.3-V logic. SDIO is the serial digital input-output that writes to or reads back from the LMH6518. SCLK is the bus clock with chip-select function controlled by CS.

LMH6518 Serial Interface Protocol, Read OperationFigure 6-1 Serial Interface Protocol, Read Operation
LMH6518 Serial Interface Protocol, Write OperationFigure 6-2 Serial Interface Protocol, Write Operation
LMH6518 Read TimingFigure 6-3 Read Timing
LMH6518 Write TimingFigure 6-4 Write Timing
Table 6-1 Data Field
FILTER PREAMP LADDER ATTENUATION
D15
(MSB)
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
(LSB)
X 0 0 0 0 0 = Full power
1 = Aux Hi-Z
0 See Table 6-3 0 0 = LG
1 = HG
See Table 6-4
Note:

Bits D5, D9, and D11 to D14 must be 0. Otherwise, device operation is undefined and specifications are not valid.

Table 6-2 Default Power-On Reset Condition
FILTER PREAMP LADDER ATTENUATION
D15
(MSB)
D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
(LSB)
0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0
Table 6-3 Filter Selection Data Field
FILTER BANDWIDTH (MHz)
D8 D7 D6
0 0 0 Full
0 0 1 20
0 1 0 100
0 1 1 200
1 0 0 350
1 0 1 650
1 1 0 750
1 1 1 Unallowed
Note:

All filters are low-pass, single pole roll-off and operate on both main and auxiliary outputs. These filters are intended as signal path bandwidth and noise limiting.

Table 6-4 Ladder Attenuation Data Field
LADDER ATTENUATION BANDWIDTH (dB)
D3 D2 D1 D0
0 0 0 0 0
0 0 0 1 −2
0 0 1 0 −4
0 0 1 1 −6
0 1 0 0 −8
0 1 0 1 −10
0 1 1 0 −12
0 1 1 1 −14
1 0 0 0 −16
1 0 0 1 −18
1 0 1 0 −20
1 0 1 1 Unallowed
1 1 0 0 Unallowed
1 1 0 1 Unallowed
1 1 1 0 Unallowed
1 1 1 1 Unallowed
Note:

An unallowed SPI state can result in undefined operation where device behavior is not valid.