JAJSDE7
June 2017
LMH6644-MIL
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
各種の電源における閉ループ・ゲインと周波数との関係
4
改訂履歴
5
概要(続き)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
3-V Electrical Characteristics
7.6
5-V Electrical Characteristics
7.7
±5-V Electrical Characteristics
7.8
Typical Performance Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Input and Output Topology
9.2.1.2
Single-Supply, Low-Power Photodiode Amplifier
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントの更新通知を受け取る方法
12.2
コミュニティ・リソース
12.3
商標
12.4
静電気放電に関する注意事項
12.5
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
Y|0
サーマルパッド・メカニカル・データ
発注情報
jajsde7_oa
7.8
Typical Performance Characteristics
V
+
= +5 V, V
–
= –5 V, R
F
= R
L
= 2 kΩ, unless specified otherwise.
Figure 1.
Closed Loop Frequency Response
for Various Supplies
Figure 3.
Closed Loop Gain vs Frequency
for Various Gain
Figure 5.
Closed Loop Gain vs Frequency
for Various Supplies
Figure 7.
Large Signal Frequency Response
Figure 9.
Closed Loop Frequency Response
for Various Supplies
Figure 11.
V
OUT
(V
PP
) for THD < 0.5%
Figure 13.
V
OUT
(V
PP
) for THD < 0.5%
Figure 15.
Open Loop Gain/Phase
for Various Temperature
Figure 17.
HD3 (dBc) vs Output Swing
Figure 19.
HD3 vs Output Swing
Figure 21.
Settling Time vs Input Step Amplitude
(Output Slew and Settle Time)
Figure 23.
V
OUT
from V
+
vs I
SOURCE
Figure 25.
V
OUT
from V
+
vs I
SOURCE
Figure 27.
Swing vs V
S
Figure 29.
Output Sinking Saturation Voltage vs I
OUT
Figure 31.
Closed Loop Output Impedance
vs Frequency A
V
= +1
Figure 33.
CMRR vs Frequency
Figure 35.
V
OS
vs V
OUT
(Typical Unit)
Figure 37.
V
OS
vs V
S
(for 3 Representative Units)
Figure 39.
V
OS
vs V
S
(for 3 Representative Units)
Figure 41.
I
OS
vs V
S
Figure 43.
I
S
vs V
S
Figure 45.
Large Signal Step Response
Figure 47.
Small Signal Step Response
Figure 49.
Small Signal Step Response
Figure 51.
Large Signal Step Response
Figure 53.
Large Signal Step Response
Figure 2.
Closed Loop Gain vs Frequency
for Various Gain
Figure 4.
Closed Loop Frequency Response
for Various Temperature
Figure 6.
Closed Loop Frequency Response
for Various Temperature
Figure 8.
Closed Loop Small Signal Frequency Response
for Various Supplies
Figure 10.
±0.1dB Gain Flatness
for Various Supplies
Figure 12.
V
OUT
(V
PP
) for THD < 0.5%
Figure 14.
Open Loop Gain/Phase
for Various Temperature
Figure 16.
HD2 (dBc) vs Output Swing
Figure 18.
HD2 vs Output Swing
Figure 20.
THD (dBc) vs Output Swing
Figure 22.
Input Noise vs Frequency
Figure 24.
V
OUT
from V
–
vs I
SINK
Figure 26.
V
OUT
from V
–
vs I
SINK
Figure 28.
Short Circuit Current (to V
S
/2) vs V
S
Figure 30.
Output Sourcing Saturation Voltage vs I
OUT
Figure 32.
PSRR vs Frequency
Figure 34.
Crosstalk Rejection vs Frequency
(Output to Output)
Figure 36.
V
OS
vs V
CM
(Typical Unit)
Figure 38.
V
OS
vs V
S
(for 3 Representative Units)
Figure 40.
I
B
vs V
S
Figure 42.
I
S
vs V
CM
Figure 44.
Small Signal Step Response
Figure 46.
Large Signal Step Response
Figure 48.
Small Signal Step Response
Figure 50.
Small Signal Step Response
Figure 52.
Large Signal Step Response