9.2.2 Detailed Design Procedure

No matter how low an Rf is selected, there is a need for C_f in order to stabilize the circuit. The reason for this is that the op amp input capacitance and Q1 equivalent collector capacitance together (C_IN) will cause additional phase shift to the signal fed back to the inverting node. C_f will function as a zero in the feedback path counteracting the effect of the C_IN and acting to stabilized the circuit. By proper selection of C_f such that the Op Amp open loop gain is equal to the inverse of the feedback factor at that frequency, the response is optimized with a theoretical 45° phase margin where GBWP is the Gain Bandwidth Product of the Op Amp, optimized as such, the I-V converter will have a theoretical pole, fp, at: (2) With Op Amp input capacitance of 3pF and an estimate for Q1 output capacitance of about 3 pF as well, C_IN = 6 pF. From the typical performance plots, GBWP is approximately 57 MHz. Therefore, with Rf = 1k, from Equation 2 and Equation 3 : C_f = ∼4.1 pF and fp = 39 MHz.

For this example, optimum C_f was empirically determined to be around 5 pF. This time domain response is shown in Figure 58 showing about 9 ns rise/fall times, corresponding to about 39 MHz for fp. The overall supply current from the +5-V supply is around 5 mA with no load.