JAJSA84E February   2005  – May 2016 LMH6703

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Feature Description
    3. 8.3 Device Functional Modes
      1. 8.3.1 Feedback Resistor Selection
      2. 8.3.2 DC Accuracy and Noise
      3. 8.3.3 Enable/Disable
  9. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Capacitive Load Drive
      2. 9.1.2 Video Performance
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS ±6.75 V
IOUT See (2)
Common mode input voltage V− V+ V
Maximum junction temperature 150 °C
Storage temperature −65 150 °C
Soldering Information    Infrared or convection (20 sec.) 235 °C
Wave soldering (10 sec.) 260
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum output current (IOUT) is determined by device power dissipation limitations.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Machine model (MM), per JEDEC specification JESD22-C101, all pins(2) ±200
(1) Human body model: 1.5 kΩ in series with 100 pF. JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 2000-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
(2) Machine model: 0 Ω in series with 200 pF. JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 200-V MM is possible with the necessary precautions. Pins listed as ±200 V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
Operating temperature –40 85 °C
Supply voltage ±4 ±6 V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC(1) LMH6703 UNIT
DBV (SOT-23) D (SOIC)
6 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 182 133 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 139 79 °C/W
RθJB Junction-to-board thermal resistance 40 73 °C/W
ψJT Junction-to-top characterization parameter 28 28 °C/W
ψJB Junction-to-board characterization parameter 40 73 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).

6.5 Electrical Characteristics

at TJ = 25°C, AV = 2, VS = ±5 V, RL = 100 Ω, RF = 560 Ω, SD = Floating (unless otherwise noted)(1)
Boldface limits apply at the temperature extremes.
PARAMETER CONDITIONS MIN (4) TYP (3) MAX (4) UNIT
FREQUENCY DOMAIN PERFORMANCE
SSBW –3-dB bandwidth VOUT = 0.5 VPP, AV = +1 1800 MHz
VOUT = 0.5 VPP, AV = +2 1200
LSBW VOUT = 2 VPP 750
VOUT = 4 VPP 500
GF 0.1-dB gain flatness VOUT = 0.5 VPP 150 MHz
VOUT = 2 VPP 150
DG Differential gain RL = 150 Ω, 4.43 MHz 0.01%
DP Differential phase RL = 150 Ω, 4.43 MHz 0.02 deg
TIME DOMAIN RESPONSE
tr Rise time 2-V step, 10% to 90% 0.5 ns
6-V step, 10% to 90% 1.05 ns
tf Fall time 2-V step, 10% to 90% 0.5 ns
6-V step, 10% to 90% 1.05 ns
SR Slew rate 4-V step, 10% to 90% (2) 4200 V/µs
6-V step, 10% to 90% (2) 4500
ts Settling time 2-V step, VOUT within 0.1% 10 ns
DISTORTION AND NOISE RESPONSE
HD2 2nd harmonic distortion 2 VPP, 5 MHz, SOT-23-6 −87 dBc
2 VPP, 20 MHz, SOT-23-6 −69
2 VPP, 50 MHz, SOT-23-6 −60
HD3 3rd harmonic distortion 2 VPP, 5 MHz, SOT-23-6 −100 dBc
2 VPP, 20 MHz, SOT-23-6 −90
2 VPP, 50 MHz, SOT-23-6 −70
IMD 3rd order intermodulation products 50 MHz, PO = 5 dBm/ tone −80 dBc
en Input referred voltage noise >1 MHz 2.3 nV/√Hz
in Input referred noise current Inverting Pin
>1 MHz 		18.5 pA/√Hz
Input referred noise current Non-Inverting Pin
>1 MHz 		3 pA/√Hz
u
VOS Input offset voltage ±1.5 ±7
±9		 mV
TCVOS Input offset voltage average drift  (6) 22 µV/°C
IB Input bias current Non-Inverting (5) −7 –20
–23		 µA
Inverting (5) −2 ±35
±44
TCIB Input bias current average drift Non-Inverting (6) +30 nA/°C
Inverting (6) −70
VO Output voltage range RL = ∞ ±3.3 ±3.45 V
RL = 100 Ω ±3.2
±3.14		 ±3.4
PSRR Power supply rejection ratio VS = ± 4.0 V to ±6.0 V 48
46		 52 dB
CMRR Common mode rejection ratio VCM = −1.0 V to +1.0 V 45
44		 47 dB
IS Supply current (enabled) SD = 2 V, RL = ∞ 11 12.5
15.0		 mA
Supply current (disabled) SD = 0.8 V, RL = ∞ 0.2 0.900
0.935		 mA
MISCELLANEOUS PERFORMANCE
RIN+ Non-inverting input resistance 1 MΩ
RIN− Inverting input resistance Output Impedance of Input Buffer 30 Ω
CIN Non-inverting input capacitance 0.8 pF
RO Output resistance Closed Loop 0.05 Ω
CMVR Input common mode voltage range CMRR ≥ 40 dB ±1.9 V
IO Linear output current VIN = 0 V, VOUT ≤ ±80 mV ±55 ±90 mA
ENABLE/DISABLE PERFORMANCE (DISABLED LOW)
TON Enable time 10 ns
TOFF Disable time 10 ns
Output glitch 50 mVPP
VIH Enable voltage SD ≥ VIH 2.0 V
VIL Disable voltage SD ≤ VIL 0.8 V
IIH Disable pin bias current, high SD = V+(5) −7 ±70 µA
IIL Disable pin bias current, low SD = 0 V (5) −50 −240 −400 µA
IOZ Disabled output leakage current VOUT = ±1.8 V 0.07 ±25
±40		 µA
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. Parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(2) Slew rate is the average of the rising and falling edges.
(3) Typical numbers are the most likely parametric norm.
(4) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods.
(5) Negative input current implies current flowing out of the device.
(6) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.