SNAS642A
June 2014 – July 2014
LMK00804B
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Simplified Schematic
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Pin Characteristics
7.2
Absolute Maximum Ratings
7.3
Handling Ratings
7.4
Recommended Operating Conditions
7.5
Thermal Information
7.6
Power Supply Characteristics
7.7
LVCMOS / LVTTL DC Characteristics
7.8
Differential Input DC Characteristics
7.9
Electrical Characteristics (VDDO = 3.3 V ± 5%)
7.10
Electrical Characteristics (VDDO = 2.5 V ± 5%)
7.11
Electrical Characteristics (VDDO = 1.8 V ± 0.15 V)
7.12
Electrical Characteristics (VDDO = 1.5 V ± 5%)
7.13
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.2.1
25
9.3
Feature Description
9.3.1
Clock Enable Timing
9.4
Device Functional Modes
9.4.1
Clock Input Function
10
Applications and Implementation
10.1
Application Information
10.2
Output Clock Interface Circuit
10.3
Input Detail
10.4
Input Clock Interface Circuits
10.5
Typical Applications
10.5.1
Design Requirements
10.5.2
Detailed Design Procedure
10.5.3
Application Curves
10.5.3.1
System-Level Phase Noise and Additive Jitter Measurement
10.6
Do's and Don'ts
10.6.1
Power Considerations
10.6.2
Recommendations for Unused Input and Output Pins
10.6.3
Input Slew Rate Considerations
11
Power Supply Recommendations
11.1
Power Supply Considerations
11.1.1
Power-Supply Filtering
11.1.2
Thermal Management
12
Layout
12.1
Layout Guidelines
12.1.1
Ground Planes
12.1.2
Power Supply Pins
12.1.3
Differential Input Termination
12.1.4
LVCMOS Input Termination
12.1.5
Output Termination
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.2
Trademarks
13.3
Electrostatic Discharge Caution
13.4
Glossary
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PW|16
MPDS361A
サーマルパッド・メカニカル・データ
発注情報
snas642a_oa
snas642a_pm
8 Parameter Measurement Information
NOTE
: V
CM
= V
ICM
- V
ID
/2 = (V
IH
+ V
IL
)/2
Figure 5. Differential Input Level
Figure 6. Output Voltage, and Rise and Fall Times
Figure 7. Output Skew and Propagation Delay