SNAS605AS March 2013 – May 2020 LMK04821 , LMK04826 , LMK04828
PRODUCTION DATA.
The LMK0482x device can be programmed to automatically exit holdover mode when the frequency on the active clock input achieves a specified accuracy. The programmable variables include PLL1_WND_SIZE and HOLDOVER_DLD_CNT.
See Digital Lock Detect Frequency Accuracy to calculate the register values to cause holdover to automatically exit upon reference signal recovery to within a user specified ppm error of the holdover frequency.
The time to exit holdover may vary, because the condition for automatic holdover exit is for the reference and feedback signals to have a time/phase error less than a programmable value. Because two clock signals may be very close in frequency but not close in phase, it may take a long time for the phases of the clocks to align themselves within the allowable time/phase error before holdover exits.