JAJSR90A
September 2023 – July 2024
LMQ64480-Q1
,
LMQ644A0-Q1
,
LMQ644A2-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
5.1
Wettable Flanks
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input Voltage Range (VIN)
7.3.2
Enable EN Pin and Use as VIN UVLO
7.3.3
Output Voltage Selection and Soft Start
7.3.4
SYNC Allows Clock Synchronization and Mode Selection
7.3.5
Clock Locking
7.3.6
Adjustable Switching Frequency
7.3.7
Power-Good Output Voltage Monitoring
7.3.8
Internal LDO, VCC UVLO, and BIAS Input
7.3.9
Bootstrap Voltage and VCBOOT-UVLO (CB1 and CB2 Pin)
7.3.10
CONFIG Device Configuration Pin
7.3.11
Spread Spectrum
7.3.12
Soft Start and Recovery From Dropout
7.3.13
Overcurrent and Short-Circuit Protection
7.3.14
Hiccup
7.3.15
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Standby Mode
7.4.3
Active Mode
7.4.3.1
Peak Current Mode Operation
7.4.3.2
Auto Mode Operation
7.4.3.2.1
Diode Emulation
7.4.3.3
FPWM Mode Operation
7.4.3.4
Minimum On-time (High Input Voltage) Operation
7.4.3.5
Dropout
7.4.3.6
Recovery from Dropout
7.4.3.7
Other Fault Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Choosing the Switching Frequency
8.2.2.2
Setting the Output Voltage
8.2.2.3
Inductor Selection
8.2.2.4
Output Capacitor Selection
8.2.2.5
Input Capacitor Selection
8.2.2.6
BOOT Capacitor
8.2.2.7
VCC
8.2.2.8
CFF and RFF Selection
8.2.2.9
SYNCHRONIZATION AND MODE
8.2.2.10
External UVLO
8.2.2.11
Typical Thermal Performance
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.1.1
Ground and Thermal Considerations
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
サード・パーティ製品に関する免責事項
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RXA|24
MPQF597C
サーマルパッド・メカニカル・データ
発注情報
JAJSR90A_pm
jajsr90a_oa
6.6
Typical Characteristics
Unless otherwise specified, V
IN
= 13.5 V.
Figure 6-1
Feedback Voltage
Figure 6-3
High-side and Low-side Switches R
DS_ON
EN = 0 V
Figure 6-2
Shutdown Supply Current
Figure 6-4
High-side and Low-side Current Limits LMQ644A2