JAJSHL8B June   2012  – June 2019 LMR12015 , LMR12020

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Performance Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Function
      2. 7.3.2  Low Input Voltage Considerations
      3. 7.3.3  High Output Voltage Considerations
      4. 7.3.4  Frequency Synchronization
      5. 7.3.5  Current Limit
      6. 7.3.6  Frequency Foldback
      7. 7.3.7  Soft Start
      8. 7.3.8  Output Overvoltage Protection
      9. 7.3.9  Undervoltage Lockout
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Operation Modes
      1. 7.4.1 Enable Pin / Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1  Custom Design With WEBENCH® Tools
        2. 8.2.1.2  Inductor Selection
          1. 8.2.1.2.1 Inductor Calculation Example
          2. 8.2.1.2.2 Inductor Material Selection
        3. 8.2.1.3  Input Capacitor
        4. 8.2.1.4  Output Capacitor
        5. 8.2.1.5  Catch Diode
        6. 8.2.1.6  Boost Diode (Optional)
        7. 8.2.1.7  Boost Capacitor
        8. 8.2.1.8  Output Voltage
        9. 8.2.1.9  Feedforward Capacitor (Optional)
        10. 8.2.1.10 Calculating Efficiency and Junction Temperature
          1. 8.2.1.10.1 Schottky Diode Conduction Losses
          2. 8.2.1.10.2 Inductor Conduction Losses
          3. 8.2.1.10.3 MOSFET Conduction Losses
          4. 8.2.1.10.4 MOSFET Switching Losses
          5. 8.2.1.10.5 IC Quiescent Losses
          6. 8.2.1.10.6 MOSFET Driver Losses
          7. 8.2.1.10.7 Total Power Losses
          8. 8.2.1.10.8 Efficiency Calculation Example
          9. 8.2.1.10.9 Calculating the LMR2015/20 Junction Temperature
      2. 8.2.2 Application Curves
      3. 8.2.3 LMR12015/20 Circuit Examples
  9. 9 Layout
    1. 9.1 Layout Considerations
      1. 9.1.1 Compact Layout
      2. 9.1.2 Ground Plane and Shape Routing
      3. 9.1.3 FB Loop
      4. 9.1.4 PCB Summary
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 10.1.2 開発サポート
        1. 10.1.2.1 WEBENCH®ツールによるカスタム設計
    2. 10.2 関連リンク
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 コミュニティ・リソース
    5. 10.5 商標
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 Glossary
  11. 11メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DSC Package
10-Pin WSON
Top View
LMR12015 LMR12020 30197004.gif

Pin Descriptions

PIN DESCRIPTION
NO. NAME
1,2 SW Output switch. Connects to the inductor, catch diode, and bootstrap capacitor.
3 BOOST Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is connected between the BOOST and SW pins.
4 EN Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3 V.
5 SYNC Frequency synchronization input. Drive this pin with an external clock or pulse train. Ground it to use the internal clock.
6 FB Feedback pin. Connect FB to the external resistor divider to set output voltage.
7 GND Signal and Power Ground pin. Place the bottom resistor of the feedback network as close as possible to this pin for accurate regulation.
8 AVIN Supply voltage for the control circuitry.
9,10 PVIN Supply voltage for output power stage. Connect a bypass capacitor to this pin.
DAP GND Signal / Power Ground and thermal connection. Tie this directly to GND (pin 7). See regarding optimum thermal layout.