JAJSF12A March   2018  – January 2024 LMR14010A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fixed Frequency PWM Control
      2. 6.3.2 Bootstrap Voltage (CB)
      3. 6.3.3 Setting the Output Voltage
      4. 6.3.4 Enable ( SHDN ) and VIN Undervoltage Lockout
      5. 6.3.5 Current Limit
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Continuous Conduction Mode
      2. 6.4.2 Eco-mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Step-By-Step Design Procedure
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Output Inductor Selection
        3. 7.2.2.3 Output Capacitor Selection
        4. 7.2.2.4 Schottky Diode Selection
        5. 7.2.2.5 Input Capacitor Selection
        6. 7.2.2.6 Bootstrap Capacitor Selection
      3. 7.2.3 Application Performance Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.1 Layout Guidelines

Layout is a critical portion of good power supply design. The following guidelines help users design a PCB with the best power conversion performance, thermal performance, and minimized generation of unwanted EMI.

  1. Keep the feedback network, resistors R1 and R2, close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin.
  2. Place the input capacitor CIN close to the VIN pin. This action reduces copper trace inductance which effects input voltage ripple of the device.
  3. Place the inductor L1 close to the SW pin to reduce magnetic and electrostatic noise.
  4. Place the output capacitor COUT close to the junction of L1 and the diode D1. The L1, D1 and COUT trace must be as short as possible to reduce conducted and radiated noise.
  5. Tie the ground connection for the diode, CIN and COUT to the system ground plane in only one spot (preferably at the COUT ground point) to minimize conducted noise in the system ground plane.