JAJSEV3B
June 2017 – August 2020
LMR23615
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Characteristics
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fixed-Frequency, Peak-Current-Mode Control
7.3.2
Adjustable Frequency
7.3.3
Adjustable Output Voltage
7.3.4
Enable/Sync
7.3.5
VCC, UVLO
7.3.6
Minimum ON-Time, Minimum-OFF Time, and Frequency Foldback at Dropout Conditions
7.3.7
Internal Compensation and CFF
7.3.8
Bootstrap Voltage (BOOT)
7.3.9
Overcurrent and Short-Circuit Protection
7.3.10
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Active Mode
7.4.3
CCM Mode
7.4.4
Light Load Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Output Voltage Setpoint
8.2.2.3
Switching Frequency
8.2.2.4
Inductor Selection
8.2.2.5
Output Capacitor Selection
8.2.2.6
Feedforward Capacitor
8.2.2.7
Input Capacitor Selection
8.2.2.8
Bootstrap Capacitor Selection
8.2.2.9
VCC Capacitor Selection
8.2.2.10
Undervoltage Lockout Setpoint
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Compact Layout for EMI Reduction
10.1.2
Ground Plane and Thermal Considerations
10.1.3
Feedback Resistors
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.1.1.1
Custom Design With WEBENCH® Tools
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
静電気放電に関する注意事項
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRR|12
MPSS085A
サーマルパッド・メカニカル・データ
DRR|12
PPTD338C
発注情報
jajsev3b_oa
jajsev3b_pm
7.2
Functional Block Diagram