JAJSFN4C June   2018  – October 2020 LMR33620-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 System Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power-Good Flag Output
      2. 7.3.2 Enable and Start-up
      3. 7.3.3 Current Limit and Short Circuit
      4. 7.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto Mode
      2. 7.4.2 Dropout
      3. 7.4.3 Minimum Switch On-Time
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Choosing the Switching Frequency
        3. 8.2.2.3  Setting the Output Voltage
          1. 8.2.2.3.1 Fixed Output Voltage Option
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Input Capacitor Selection
        7. 8.2.2.7  CBOOT
        8. 8.2.2.8  VCC
        9. 8.2.2.9  CFF Selection
        10. 8.2.2.10 External UVLO
        11. 8.2.2.11 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 サポート・リソース
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RNX|12
サーマルパッド・メカニカル・データ
発注情報

8.2.2.3 Setting the Output Voltage

The output voltage of the LMR33620-Q1 is externally adjustable using a resistor divider network. The range of recommended output voltage is found in Section 6.3. The divider network is comprised of RFBT and RFBB, and closes the loop between the output voltage and the converter. The converter regulates the output voltage by holding the voltage on the FB pin equal to the internal reference voltage, VREF. The resistance of the divider is a compromise between excessive noise pick-up and excessive loading of the output. Smaller values of resistance reduce noise sensitivity but also reduce the light-load efficiency. The recommended value for RFBT is 100 kΩ; with a maximum value of 1 MΩ. If a 1 MΩ is selected for RFBT, then a feedforward capacitor must be used across this resistor to provide adequate loop phase margin (see Section 8.2.2.9). Once RFBT is selected, Equation 3 is used to select RFBB. VREF is nominally 1 V (see Section 6.5 for limits).

Equation 3. GUID-FBFF9D96-2546-43ED-84D8-73EAD8ACB526-low.gif

For this 5-V example, RFBT = 100 kΩ and RFBB = 24.9 kΩ are chosen.