JAJSFY3D August   2018  – August 2022 LMR36006-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 System Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Good Flag Output
      2. 8.3.2 Enable and Start-up
      3. 8.3.3 Current Limit and Short Circuit
      4. 8.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto Mode
      2. 8.4.2 Forced PWM Operation
      3. 8.4.3 Dropout
      4. 8.4.4 Minimum Switch On-Time
      5. 8.4.5 Spread Spectrum Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design 1: Low Power 24-V, 600-mA PFM Converter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Custom Design With WEBENCH Tools
          2. 9.2.1.2.2  Choosing the Switching Frequency
          3. 9.2.1.2.3  Setting the Output Voltage
            1. 9.2.1.2.3.1 FB for Adjustable Output
          4. 9.2.1.2.4  Inductor Selection
          5. 9.2.1.2.5  Output Capacitor Selection
          6. 9.2.1.2.6  Input Capacitor Selection
          7. 9.2.1.2.7  CBOOT
          8. 9.2.1.2.8  VCC
          9. 9.2.1.2.9  CFF Selection
            1. 9.2.1.2.9.1 External UVLO
          10. 9.2.1.2.10 Maximum Ambient Temperature
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2: High Density 12-V , 600-mA FPWM Converter
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報
External UVLO

In some cases, an input UVLO level different than that provided internal to the device is needed. This can be accomplished by using the circuit shown in Figure 9-3 can be used. The input voltage at which the device turns on is designated VON; while the turnoff voltage is VOFF. First, a value for RENB is chosen in the range of 10 kΩ to 100 kΩ and then Equation 10 is used to calculate RENT and VOFF.

GUID-464988E8-8E16-4F45-8870-22C1093F1F9F-low.gifFigure 9-3 Setup for External UVLO Application
Equation 10. GUID-07FC2A5D-B42C-4CA5-A4F0-89F27434FB07-low.gif

where

  • VON = VIN turnon voltage
  • VOFF = VIN turnoff voltage