JAJSFY3D August   2018  – August 2022 LMR36006-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 System Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Good Flag Output
      2. 8.3.2 Enable and Start-up
      3. 8.3.3 Current Limit and Short Circuit
      4. 8.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto Mode
      2. 8.4.2 Forced PWM Operation
      3. 8.4.3 Dropout
      4. 8.4.4 Minimum Switch On-Time
      5. 8.4.5 Spread Spectrum Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design 1: Low Power 24-V, 600-mA PFM Converter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Custom Design With WEBENCH Tools
          2. 9.2.1.2.2  Choosing the Switching Frequency
          3. 9.2.1.2.3  Setting the Output Voltage
            1. 9.2.1.2.3.1 FB for Adjustable Output
          4. 9.2.1.2.4  Inductor Selection
          5. 9.2.1.2.5  Output Capacitor Selection
          6. 9.2.1.2.6  Input Capacitor Selection
          7. 9.2.1.2.7  CBOOT
          8. 9.2.1.2.8  VCC
          9. 9.2.1.2.9  CFF Selection
            1. 9.2.1.2.9.1 External UVLO
          10. 9.2.1.2.10 Maximum Ambient Temperature
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2: High Density 12-V , 600-mA FPWM Converter
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.4 Minimum Switch On-Time

Every switching regulator has a minimum controllable on-time dictated by the inherent delays and blanking times associated with the control circuits. This imposes a minimum switch duty cycle and, therefore, a minimum conversion ratio. The constraint is encountered at high input voltages and low output voltages. To help extend the minimum controllable duty cycle, the LMR36006-Q1 automatically reduces the switching frequency when the minimum on-time limit is reached. This way, the converter can regulate the lowest programmable output voltage at the maximum input voltage. An estimate for the approximate input voltage, for a given output voltage, before frequency foldback occurs, is found in Equation 2. As the input voltage is increased, the switch on-time (duty cycle) reduces to regulate the output voltage. When the on-time reaches the limit, the switching frequency drops, while the on-time remains fixed.

Equation 2. GUID-F3767D00-08E2-4585-837E-9618E29D5E36-low.gif
GUID-D8B7A5C9-8E60-4046-8BE6-B9B6E15F9DD0-low.gifFigure 8-11 Switching Frequency vs Input Voltage VOUT = 3.3 V