JAJSIO5B July   2019  – February 2020 LMR36506-Q1

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流の関係 VOUT = 3.3V (固定)、2.2MHz
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD (Automotive) Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Voltage Selection
      2. 8.3.2  Enable and Start-up
      3. 8.3.3  External CLK SYNC (with MODE/SYNC)
      4. 8.3.4  Adjustable Switching Frequency (with RT)
      5. 8.3.5  Power-Good Flag Output
      6. 8.3.6  Internal LDO, VCC UVLO, and VOUT/BIAS Input
      7. 8.3.7  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Terminal)
      8. 8.3.8  Spread Spectrum
      9. 8.3.9  Soft Start and Recovery from Dropout
        1. 8.3.9.1 Recovery from Dropout
      10. 8.3.10 Current Limit and Short Circuit
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
      4. 8.4.4 Continuous Conduction Mode (CCM)
      5. 8.4.5 Discontinuous Conduction Mode (DCM)
      6. 8.4.6 Pulse Frequency Modulation (PFM)
      7. 8.4.7 Forced Pulse Width Modulation Mode (FPWM)
      8. 8.4.8 Dropout Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Choosing the Switching Frequency
        2. 9.2.2.2 Setting the Output Voltage
          1. 9.2.2.2.1 FB for Adjustable Output
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Input Capacitor Selection
        6. 9.2.2.6 CBOOT
        7. 9.2.2.7 VCC
        8. 9.2.2.8 CFF Selection
          1. 9.2.2.8.1 External UVLO
        9. 9.2.2.9 Maximum Ambient Temperature
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 24 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
VIN_R Minimum operating Input Voltage (Rising) Rising Threshold 3.4 3.5 3.6 V
VIN_F Minimum operating Input Voltage (Falling) Once Operating; Falling Threshold 2.87 3.0 V
IQ_13p5_Fixed Non-switching input current; measured at VIN pin (3) VIN = VEN = 13.5V ; VOUT/BIAS = 5.25V, VMODE/SYNC = VRT = 0V; Fixed Output Option 0.55 0.7 0.855 µA
IQ_13p5_Adj Non-switching input current; measured at VIN pin (3) VIN = VEN = 13.5V ; VFB = 1.5V, VMODE/SYNC = VRT = 0V; Adjustable Output Option 13.5 17.5 21.5 µA
IQ_24p0_Fixed Non-switching input current; measured at VIN pin (3) VIN = VEN = 24V ; VOUT/BIAS = 5.25V, VMODE/SYNC = VRT = 0V; Fixed Output Option 1.05 1.2 1.4 µA
IQ_24p0_Adj Non-switching input current; measured at VIN pin (3) VIN = VEN = 24V ; VFB = 1.5V, VMODE/SYNC = VRT = 0V; Adjustable Output Option 14.9 18 21.5
µA

IB_13p5 Current into VOUT/BIAS pin (not switching)(3) VIN = 13.5V, VOUT/BIAS = 5.25V, VMODE/SYNC = VRT = 0V; Fixed Output Option 14.75 17 20.65 µA
IB_24p0 Current into VOUT/BIAS pin (not switching)(3) VIN = 24V, VOUT/BIAS = 5.25V, VMODE/SYNC = VRT = 0V; Fixed Output Option 14.5 17.5 20.5 µA
ISD_13p5 Shutdown quiescent current; measured at VIN pin VEN = 0; VIN = 13.5V 0.4 0.5 0.685 µA
ISD_24p0 Shutdown quiescent current; measured at VIN pin VEN = 0; VIN = 24V 0.873 1 1.2 µA
ENABLE (EN PIN)
VEN-WAKE Enable wake-up threshold 0.4 V
VEN-VOUT Precision enable high level for VOUT 1.16 1.263 1.36 V
VEN-HYST Enable threshold hysteresis below VEN-VOUT 0.3 0.35 0.38 V
ILKG-EN Enable input leakage current VEN = 3.3 V 0.1 0.2 2 nA
INTERNAL LDO
VCC Internal VCC voltage 3.6 V ≤ VIN ≤ 65 V; Adjustable Output Option 3.125 3.15 3.22 V
VCC Internal VCC voltage 3.6 V ≤ VIN ≤ 65 V; VOUT/BIAS = 3.3 V 3.12 3.15 3.24 V
ICC Bias regulator current limit 25 85 135 mA
VCC-UVLO Internal VCC undervoltage lockout VCC rising under voltage threshold 3.1 3.2 3.5 V
VCC-UVLO-HYST Internal VCC under voltage lock-out hysteresis Hysteresis below VCC-UVLO 0.54 0.7 1.1 V
CURRENT LIMITS
ISC-0p6 Short circuit high side current Limit 0.6A Version 0.87 1 1.11 A
ILS-LIMIT-0p6 Low side current limit 0.6A Version 0.64 0.7 0.752 A
IPEAK-MIN-0p6 Minimum Peak Inductor Current PFM operation, 0.6A Version; Duty Factor = 0 0.14 0.18 0.225 A
IZC Zero Cross Current PFM Operation 0 0.01 0.022 A
IL-NEG Negative current limit FPWM operation –0.4 –0.5 –0.6 A
POWER GOOD
VPG-OV PGOOD upper threshold - Rising % of FB voltage 105 107 110 %
VPG-UV PGOOD lower threshold - Falling % of FB voltage 92 94 96.5 %
VPG-HYS PGOOD hysteresis % of FB voltage 1 1.5 2 %
VPG-VALID Minimum input voltage for proper PG function 0.75 1 2 V
RPG-EN5p0 RDS(ON) PG output VEN = 5.0V, 1mA pull-up current 20 40 70 Ω
RPG-EN0 RDS(ON) PG output VEN = 0 V, 1mA pull-up current 10 17 30 Ω
OSCILLATOR (MODE/SYNC)
VSYNC-HIGH Sync input and mode high level threshold 1.8 V
VSYNC-HYS Sync input hysteresis 230 285 365 mV
VSYNC-LOW Sync input and mode low level threshold 0.8 V
MOSFETS
RDS-ON-HS High-side MOSFET on-resistance Load = 0.3 A 550 860 mΩ
RDS-ON-LS Low-side MOSFET on-resistance Load = 0.3 A 275 430 mΩ
VCBOOT-UVLO Cboot - SW UVLO threshold 2.2 2.3 2.4 V
VOLTAGE REFERENCE
VFB_Fixed3p3 Initial VOUT voltage accuracy for 3.3 V VIN = 3.6V to 60V FPWM Mode 3.25 3.3 3.34 V
VFB_Fixed5p0 Initial VOUT voltage accuracy for 5 V VIN = 5.5V to 60V FPWM Mode 4.93 5 5.07 V
VREF Internal reference voltage VIN = 3.6V to 60V FPWM Mode 0.985 1 1.015 V
IFB FB input current Adjsutable output voltage versions only, FB = 1V 85 100 nA