JAJSIO5B July   2019  – February 2020 LMR36506-Q1

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流の関係 VOUT = 3.3V (固定)、2.2MHz
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD (Automotive) Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Voltage Selection
      2. 8.3.2  Enable and Start-up
      3. 8.3.3  External CLK SYNC (with MODE/SYNC)
      4. 8.3.4  Adjustable Switching Frequency (with RT)
      5. 8.3.5  Power-Good Flag Output
      6. 8.3.6  Internal LDO, VCC UVLO, and VOUT/BIAS Input
      7. 8.3.7  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Terminal)
      8. 8.3.8  Spread Spectrum
      9. 8.3.9  Soft Start and Recovery from Dropout
        1. 8.3.9.1 Recovery from Dropout
      10. 8.3.10 Current Limit and Short Circuit
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
      4. 8.4.4 Continuous Conduction Mode (CCM)
      5. 8.4.5 Discontinuous Conduction Mode (DCM)
      6. 8.4.6 Pulse Frequency Modulation (PFM)
      7. 8.4.7 Forced Pulse Width Modulation Mode (FPWM)
      8. 8.4.8 Dropout Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Choosing the Switching Frequency
        2. 9.2.2.2 Setting the Output Voltage
          1. 9.2.2.2.1 FB for Adjustable Output
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Input Capacitor Selection
        6. 9.2.2.6 CBOOT
        7. 9.2.2.7 VCC
        8. 9.2.2.8 CFF Selection
          1. 9.2.2.8.1 External UVLO
        9. 9.2.2.9 Maximum Ambient Temperature
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

RPE Package
9-Pin VQFN-HR
Top View (All variants)
LMR36506-Q1 Auto.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 RT
or MODE/SYNC 		A When the part is trimmed as the RT pin variant, the switching frequency in the part can be adjusted from 200 kHz to 2.2 MHz based on the resistor value connected between RT and GND.
When the pin is trimmed as the MODE/SYNC variant, the part can operate in user-selectable PFM/FPWM operation. In FPWM, the part can be synchronized to an external clock. Clock triggers on rising edge of applied external clock.
Do not float this pin.
2 PGOOD A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. It goes low when EN = low. It can be open or grounded when not used.
3 EN A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN. Do not float.
4 VIN P Input supply to regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and GND.
5 SW P Regulator switch node. Connect to power inductor.
6 BOOT P Bootstrap supply voltage for internal high-side driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin.
7 VCC P Internal LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to GND.
8 VOUT/BIAS or FB A Fixed output options are available with the VOUT/BIAS pin variant. Connect to output voltage node for fixed VOUT. Check the Device Comparison Table for more details.
The FB pin variant can help adjust the output voltage. Connect to tap point of feedback voltage divider. Do not float the pin.
9 GND G Power ground terminal. Connect to system ground. Connect to CIN with short, wide traces.
A = Analog, P = Power, G = Ground