JAJSPD7 December   2022 LMR51440 , LMR51450

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2.     ESD Ratings
    3. 7.2 Recommended Operating Conditions
    4. 7.3 Thermal Information
    5. 7.4 Electrical Characteristics
    6. 7.5 System Characteristics
    7. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency Peak Current Mode Control
      2. 8.3.2  Adjustable Output Voltage
      3. 8.3.3  Enable
      4. 8.3.4  Switching Frequency
      5. 8.3.5  Power-Good Flag Output
      6. 8.3.6  Minimum ON-Time, Minimum OFF-Time, and Frequency Foldback
      7. 8.3.7  Bootstrap Voltage
      8. 8.3.8  Overcurrent and Short-Circuit Protection
      9. 8.3.9  Soft Start
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 CCM Mode
      4. 8.4.4 Light-Load Operation (PFM Version)
      5. 8.4.5 Light-Load Operation (FPWM Version)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Set-Point
        2. 9.2.2.2 Switching Frequency
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Input Capacitor Selection
        6. 9.2.2.6 Bootstrap Capacitor
        7. 9.2.2.7 Undervoltage Lockout Set-Point
      3. 9.2.3 Application Curves
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
        1. 9.5.1.1 Compact Layout for EMI Reduction
        2. 9.5.1.2 Feedback Resistors
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.3 Enable

The voltage on the EN pin controls the ON and OFF operation of the LMR514x0. A voltage of less than 0.8 V shuts down the device, while a voltage of greater than 1.4 V is required to start the converter. The EN pin is an input and cannot be left open or floating. The simplest way to enable the operation of the LMR514x0 is to connect the EN to VIN. This connection allows self-start-up of the LMR514x0 when VIN is within the operating range.

Many applications benefit from the employment of an enable divider RENT and RENB (Figure 8-3) to establish a precision system UVLO level for the converter. System UVLO can be used for supplies operating from utility power as well as battery power. System UVLO can be used for sequencing, ensuring reliable operation, or supplying protection, such as a battery discharge level. An external logic signal can also be used to drive EN input for system sequencing and protection. Note, the EN pin voltage must not to be greater than VIN + 0.3 V. TI does not recommend to apply EN voltage when VIN is 0 V.

GUID-02AFC43C-B605-4137-8726-5BD3485130B8-low.gifFigure 8-3 System UVLO by Enable Divider