JAJSOM5B June   2023  – December 2023 LMR51606 , LMR51610

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency Peak Current Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable
      4. 7.3.4 Minimum ON Time, Minimum OFF Time, and Frequency Foldback
      5. 7.3.5 Bootstrap Voltage
      6. 7.3.6 Overcurrent and Short-Circuit Protection
      7. 7.3.7 Soft Start
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation (PFM Version)
      5. 7.4.5 Light-Load Operation (FPWM Version)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Switching Frequency
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 Bootstrap Capacitor
        8. 8.2.2.8 Undervoltage Lockout Setpoint
        9. 8.2.2.9 Replacing Non Sync Converter
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Compact Layout for EMI Reduction
        2. 8.4.1.2 Feedback Resistors
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Limits apply over operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and Maximum limits(1) are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following s apply: VIN = 4 V to 65 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ(VIN) VIN quiescent current VEN = 3 V, FPWM Operation 420 µA
IQ(VIN) VIN quiescent current (non-switching)(2) VEN = 3 V, PFM Variant Only 26.5 40 µA
ISD(VIN) VIN shutdown supply current VEN = 0 V 0.8 3 µA
UVLO
VINUVLO(R) VIN UVLO rising threshold VIN rising 3.82 4 V
VINUVLO(F) VIN UVLO falling threshold  VIN falling 3.4 3.56 V
VINUVLO(H) VIN UVLO hysteresis 0.25 V
ENABLE
VEN(R) EN voltage rising threshold EN rising, enable switching 1.1 1.227 1.36 V
VEN(F) EN voltage falling threshold EN falling, disable switching 0.85 1.0 1.15 V
IEN(P2) EN pin sourcing current post EN rising threshold VEN = 3 V 10 50 nA
REFERENCE VOLTAGE
Vfb Reference voltage 0.788 0.8 0.812 V
IFB(LKG) FB input leakage current VFB = 0.8 V 0.2 nA
SWITCHING FREQUENCY
fSW(CCM) Switching frequency, CCM operation "X" Version 340 400 460 KHz
Switching frequency, CCM operation "Y" Version 0.935 1.1 1.265 Mhz
STARTUP
tSS Internal fixed soft-start time 2.3 ms
POWER STAGE
RDSON(HS) High-side MOSFET on-resistance VIN = 12 V, TJ = 25°C 0.7 Ω
RDSON(LS) Low-side MOSFET on-resistance VIN = 12 V, TJ = 25°C 0.36 Ω
tON(min) Minimum ON pulse width VIN = 12 V, IOUT = 0.1A 80 ns
tON(max) Maximum ON pulse width VIN = 12 V, IOUT = 0.5A 5 µs
tOFF(min) Minimum OFF pulse width VIN = 5 V 200 ns
BOOT CIRCUIT
HIGH-SIDE GATE DRIVER
OVERCURRENT PROTECTION
IHS_PK(OC) High-side peak current limit  LMR51610 1.25 1.6 1.95 A
ILS_V(OC) Low-side valley current limit  LMR51610  TJ = –40°C to 105°C 0.9 1.1 1.3 A
ILS(NOC) Low-side negative current limit LMR51610 FPWM Only –0.66 A
IHS_PK(OC) High-side peak current limit  LMR51606 0.8 1.1 1.4 A
ILS_V(OC) Low-side valley current limit  LMR51606 0.62 0.8 0.98 A
ILS(NOC) Low-side negative current limit LMR51606 FPWM Only –0.36 A
IZC Zero-cross detection current threshold 0 A
THERMAL SHUTDOWN
TJ(SD) Thermal shutdown threshold (3) Temperature rising 165 °C
TJ(HYS) Thermal shutdown hysteresis (3) 20 °C
(1) MIN and MAX limits are 100% production tested at 25℃. Limits over the operating temperature range verified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) Not production tested. Specified by correlation by design.