JAJSKY6D October   2021  – April 2024 LMR54406 , LMR54410

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 System Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency Peak Current Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable
      4. 7.3.4 Minimum ON Time, Minimum OFF Time, and Frequency Foldback
      5. 7.3.5 Bootstrap Voltage
      6. 7.3.6 Overcurrent and Short Circuit Protection
      7. 7.3.7 Soft Start
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation (PFM Version)
      5. 7.4.5 Light-Load Operation (FPWM Version)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Set-Point
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor
        7. 8.2.2.7 Undervoltage Lockout Set-Point
        8. 8.2.2.8 Replacing Non Sync Converter
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Compact Layout for EMI Reduction
        2. 8.4.1.2 Feedback Resistors
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Limits apply over operating junction temperature (TJ ) range of –40°C to +150°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 4 V to 36 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
VIN_UVLO Undervoltage lockout thresholds Rising threshold 3.55 3.75 4 V
Falling threshold 3.25 3.45 3.65 V
Hysteresis 0.3 V
IQ-nonSW Operating quiescent current (non-switching)(1) VEN = 3.3 V, VFB=1.1V (PFM variant only) 80 120 µA
ISD Shutdown quiescent current; measured at VIN pin VEN = 0 V 3 10 µA
ENABLE (EN PIN)
VEN-VOUT-H Enable input high-level for VOUT VENABLE rising 1.1 1.23 1.36 V
VEN-VOUT-L Enable input low-level for VOUT VENABLE falling 0.95 1.1 1.22 V
VEN-VOUT-HYS Enable input hysteresis for VOUT Hysteresis 130 mV
ILKG-EN Enable input leakage current VEN = 3.3V 10 200 nA
VOLTAGE REFERENCE (FB PIN)
VFB Feedback voltage 0.79 0.8 0.81 V
ILKG-FB Feedback leakage current FB = 1.2 V 0.2 nA
SWITCHING FREQUENCY
FOSC Internal oscillator frequency 0.935 1.1 1.265 MHz
CURRENT LIMITS AND HICCUP
ISC High-side current limit(2) LMR54410 1.25 1.6 1.9 A
ILS-LIMIT Low-side current limit(2) LMR54410 .9 1.1 1.3 A
ISC High-side current limit(2) LMR54406 .85 1.1 1.3 A
ILS-LIMIT Low-side current limit(2) LMR54406 .65 0.8 .95 A
IL-ZC Zero cross detector threshold PFM variants only 0.02 A
MOSFETS
RDS-ON-HS High-side MOSFET ON-resistance TJ=25 ℃, VIN = 12 V 450 mΩ
RDS-ON-LS Low-side MOSFET ON-resistance TJ=25 ℃, VIN = 12 V 240 mΩ
THERMAL SHUTDOWN
TSD-Rising Thermal shutdown Shutdown threshold 170 °C
TSD-Falling Thermal shutdown Recovery threshold 158 °C
(1) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(2) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.