JAJSQY6 December   2024 LMR60440-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Undervoltage Lockout (UVLO)
      2. 7.3.2 Soft Start and Recovery from Dropout
      3. 7.3.3 Frequency Selection With RT
      4. 7.3.4 MODE/SYNC Pin Control
      5. 7.3.5 Output Voltage Selection
      6. 7.3.6 Current Limit
      7. 7.3.7 Hiccup Mode
      8. 7.3.8 Power-Good Function
      9. 7.3.9 Spread Spectrum
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Continuous Conduction Mode (CCM)
        2. 7.4.2.2 Auto Mode - Light Load Operation
        3. 7.4.2.3 FPWM Operation - Light Load Operation
        4. 7.4.2.4 Minimum On-Time
        5. 7.4.2.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency Selection
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor (CBOOT) Selection
        6. 8.2.2.6 FB Voltage Divider for Adjustable Output Voltages
          1. 8.2.2.6.1 Feedforward Capacitor (CFF) Selection
        7. 8.2.2.7 RPG - PG Pullup Resistor
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Plane Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 RAK Package9-Pin WQFN-HR (Top View)
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION
NO.NAME
1 VIN P Regulator input power pin to the high-side power MOSFET and internal VCC regulator. Connect to the input supply and the positive terminal of the input filter capacitor. The path from the VIN pin to the input capacitor must be as short as possible.
2 PGND G Power ground. This pin connects to the source of the low-side MOSFET internally. Connect to system ground, and the ground terminal of the CIN and COUT capacitors. The path to CIN must be as short as possible.
3 SW P Regulator switch node. Connect to the power inductor and bootstrap capacitor.
4 BOOT P High-side MOSFET driver supply for bootstrap gate drive. Connect a high quality 100nF capacitor between this pin and SW.
5 PG O Open drain power-good output. Connect to suitable voltage supply through a current limiting pull up resistor. High = regulator power good, Low = regulator fault. Goes low when EN = low. See Section 7.3.8 for details.
6 FB I Feedback pin. Connect this pin directly to the output voltage node for fixed VOUT operation. See Section 4 for the voltage level for each device variant. Connect to the center point of a feedback voltage divider placed between VOUT node and PGND to program an adjustable output voltage.
7 MODE/SYNC I Operational mode input pin. Connect this pin to the RT pin to select FPWM switching or connect this pin to GND to select PFM switching in light loads. To synchronize to an external clock, connect a 100kΩ resistor to ground and drive directly from the clock. See the Section 6.5 table for acceptable voltage levels and timing requirements.
8 RT I Frequency programming pin. A resistor from RT to PGND sets the oscillator frequency between 200kHz and 2.2MHz.
9 EN I Enable pin for the regulator. Drive this pin high to enable the device and low to disable the device. If the enable function is not needed, connect this pin to the VIN pin. See Section 6.5 for more information on acceptable voltage levels.
(1) G = Ground, I = Input, O = Output, P = Power