SLOS447I September   2004  – May 2016 LMV341 , LMV342 , LMV344

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: V+ = 2.7 V
    6. 6.6 Electrical Characteristics: V+ = 5 V
    7. 6.7 Shutdown Characteristics: V+ = 2.7 V
    8. 6.8 Shutdown Characteristics: V+ = 5 V
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PMOS Input Stage
      2. 7.3.2 CMOS Output Stage
      3. 7.3.3 Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
V+ Supply voltage(2) –0.3 5.5 V
VID Differential input voltage(3) ±5.5 V
VI Input voltage (either input) –0.3 5.5 V
VO Output voltage –0.3 VCC + 0.3 V
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values (except differential voltages) are with respect to the network GND.
(3) Differential voltages are at IN+ with respect to IN−.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN MAX UNIT
V+ Supply voltage (single-supply operation) 2.5 5.5 V
TA Operating free-air temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMV342 LMV344 LMV341 LMV342 LMV344 UNIT
D (SOIC) DBV
(SOT-23)		 DCK (SC70) DGK (VSSOP) PW (TSSOP)
8 PINS 14 PINS 6 PINS 6 PINS 8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance(2) (3) 123.9 88.7 193.4 196.8 192.3 118 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 70.2 49 145.6 82.4 78.2 46.9 °C/W
RθJB Junction-to-board thermal resistance 64.1 43 44.1 95.2 112.6 59.7 °C/W
ψJT Junction-to-top characterization parameter 25 16.9 34.1 1.8 15.2 5.1 °C/W
ψJB Junction-to-board characterization parameter 63.6 42.7 43.4 93.2 111.2 59.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

6.5 Electrical Characteristics: V+ = 2.7 V

V+ = 2.7 V, GND = 0 V, VIC = VO = V+/2, RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP(1) MAX UNIT
VIO Input offset voltage 25°C 0.25 4 mV
Full range 4.5
αVIO Average temperature coefficient of input offset voltage Full range 1.7 μV/°C
IIB Input bias current 25°C 1 120 pA
–40°C to 85°C 250
–40°C to 125°C 3 nA
IIO Input offset current 25°C 6.6 fA
CMRR Common-mode rejection ratio 0 ≤ VICR ≤ 1.7 V 25°C 56 80 dB
0 ≤ VICR ≤ 1.6 V Full range 50
kSVR Supply-voltage rejection ratio 2.7 V ≤ V+ ≤ 5 V 25°C 65 82 dB
Full range 60
VICR Common-mode input voltage range Lower range, CMRR ≥ 50 dB 25°C –0.2 0 V
Upper range, CMRR ≥ 50 dB 25°C 1.7 1.9
AV Large-signal voltage gain(2) RL = 10 kΩ to 1.35 V 25°C 78 113 dB
Full range 70
RL = 2 kΩ to 1.35 V 25°C 72 103
Full range 64
VO Output swing
(delta from supply rails)		 RL = 2 kΩ to 1.35 V Low level 25°C 24 60 mV
Full range 95
High level 25°C 26 60
Full range 95
RL = 10 kΩ to 1.35 V Low level 25°C 5 30
Full range 40
High level 25°C 5.3 30
Full range 40
ICC Supply current (per channel) 25°C 100 170 μA
Full range 230
IOS Output short-circuit current Sourcing LMV341, LMV342 25°C 20 32 mA
LMV344 18 24
Sinking 15 24
SR Slew rate RL = 10 kΩ(3) 25°C 1 V/μs
GBM Unity-gain bandwidth RL = 10 kΩ, CL = 200 pF 25°C 1 MHz
Φm Phase margin RL = 100 kΩ 25°C 72 °
Gm Gain margin RL = 100 kΩ 25°C 20 dB
Vn Equivalent input noise voltage f = 1 kHz 25°C 40 nV/√Hz
In Equivalent input noise current f = 1 kHz 25°C 0.001 pA/√Hz
THD Total harmonic distortion f = 1 kHz, AV = 1,
RL = 600 Ω, VI = 1 VPP 		25°C 0.017%
(1) Typical values represent the most likely parametric norm.
(2) GND + 0.2 V ≤ VO ≤ V+ – 0.2 V
(3) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.

6.6 Electrical Characteristics: V+ = 5 V

V+ = 5 V, GND = 0 V, VIC = VO = V+/2, RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP(1) MAX UNIT
VIO Input offset voltage 25°C 0.25 4 mV
Full range 4.5
αVIO Average temperature coefficient of input offset voltage Full range 1.9 μV/°C
IIB Input bias current 25°C 1 200 pA
–40°C to 85°C 375
–40°C to 125°C 5 nA
IIO Input offset current 25°C 6.6 fA
CMRR Common-mode rejection ratio 0 ≤ VICR ≤ 4 V 25°C 56 86 dB
0 ≤ VICR ≤ 3.9 V Full range 50
kSVR Supply-voltage rejection ratio 2.7 V ≤ V+ ≤ 5 V 25°C 65 82 dB
Full range 60
VICR Common-mode input
voltage range		 Lower range, CMRR ≥ 50 dB 25°C –0.2 0 V
Upper range, CMRR ≥ 50 dB 25°C 4 4.2
AV Large-signal voltage gain(2) RL = 10 kΩ to 2.5 V 25°C 78 116 dB
Full range 70
RL = 2 kΩ to 2.5 V 25°C 72 107
Full range 64
VO Output swing
(delta from supply rails)		 RL = 2 kΩ to 2.5 V Low level 25°C 32 60 mV
Full range 95
High level 25°C 34 60
Full range 95
RL = 10 kΩ to 2.5 V Low level 25°C 7 30
Full range 40
High level 25°C 7 30
Full range 40
ICC Supply current (per channel) 25°C 107 200 μA
Full range 260
IOS Output short-circuit current Sourcing LMV341, LMV342 25°C 85 113 mA
LMV344 85 113
Sinking 50 75
SR Slew rate RL = 10 kΩ(3) 25°C 1 V/μs
GBM Unity-gain bandwidth RL = 10 kΩ, CL = 200 pF 25°C 1 MHz
Φm Phase margin RL = 100 kΩ 25°C 70 °
Gm Gain margin RL = 100 kΩ 25°C 20 dB
Vn Equivalent input noise voltage f = 1 kHz 25°C 39 nV/√Hz
In Equivalent input noise current f = 1 kHz 25°C 0.001 pA/√Hz
THD Total harmonic distortion f = 1 kHz, AV = 1,
RL = 600 Ω, VI = 1 VPP 		25°C 0.012%
(1) Typical values represent the most likely parametric norm.
(2) GND + 0.2 V ≤ VO ≤ V+ – 0.2 V
(3) Connected as voltage follower with 2-VPP step input. Number specified is the slower of the positive and negative slew rates.

6.7 Shutdown Characteristics: V+ = 2.7 V

V+ = 2.7 V, GND = 0 V, VIC = VO = V+/2, RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ICC(SHDN) Supply current in shutdown mode VSD = 0 V 25°C 0.045 1000 nA
Full range 1.5 μA
t(on) Amplifier turnon time 25°C 5 μs
VSD Recommended shutdown pin voltage range ON mode 25°C 2.4 2.7 V
Shutdown mode 0 0.8

6.8 Shutdown Characteristics: V+ = 5 V

V+ = 5 V, GND = 0 V, VIC = VO = V+/2, RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ICC(SHDN) Supply current in shutdown mode VSD = 0 V 25°C 0.033 1 μA
Full range 1.5
t(on) Amplifier turnon time 25°C 5 μs
VSD Recommended shutdown pin voltage range ON mode 25°C 4.5 5 V
Shutdown mode 0 0.8

6.9 Typical Characteristics

LMV341 LMV342 LMV344 g_icc_vcc_los447.gif Figure 1. Supply Current vs Supply Voltage
LMV341 LMV342 LMV344 g_vos_vcc_2_los447.gif Figure 3. Output Voltage Swing vs Supply Voltage
LMV341 LMV342 LMV344 g_isr_vo_27_los447.gif Figure 5. Source Current vs Output Voltage
LMV341 LMV342 LMV344 g_isn_vo_27_los447.gif Figure 7. Sink Current vs Output Voltage
LMV341 LMV342 LMV344 g_vio_vic_27_los447.gif Figure 9. Offset Voltage vs Common-Mode Voltage
LMV341 LMV342 LMV344 g_vi_vo_25_los447.gif Figure 11. Input Voltage vs Output Voltage
LMV341 LMV342 LMV344 g_sr_vcc_los447.gif Figure 13. Slew Rate vs Supply Voltage
LMV341 LMV342 LMV344 g_sr_ta_5_los447.gif Figure 15. Slew Rate vs Temperature
LMV341 LMV342 LMV344 g_psrr_f_los447.gif Figure 17. PSRR vs Frequency
LMV341 LMV342 LMV344 g_thd_f_los447.gif Figure 19. Total Harmonic Distortion + Noise vs Frequency
LMV341 LMV342 LMV344 g_gpm_f_5ta_los447.gif
(TA = –40°C, 25°C, 125°C)
Figure 21. Gain and Phase Margin vs Frequency
LMV341 LMV342 LMV344 g_gpm_f_5rl_pos447.gif
(RL = 600 Ω, 2 kΩ, 100 kΩ)
Figure 23. Gain and Phase Margin vs Frequency
LMV341 LMV342 LMV344 g_ssnir_n40_los447.gif Figure 25. Small-Signal Noninverting Response
LMV341 LMV342 LMV344 g_ssnir_25_los447.gif Figure 27. Small-Signal Noninverting Response
LMV341 LMV342 LMV344 g_ssnir_125_los447.gif Figure 29. Small-Signal Noninverting Response
LMV341 LMV342 LMV344 g_ssir_n40_los447.gif Figure 31. Small-Signal Inverting Response
LMV341 LMV342 LMV344 g_ssir_25_los447.gif Figure 33. Small-Signal Inverting Response
LMV341 LMV342 LMV344 g_ssir_125_los447.gif Figure 35. Small-Signal Inverting Response
LMV341 LMV342 LMV344 g_iib_ta_los447.gif Figure 2. Input Bias Current vs Temperature
LMV341 LMV342 LMV344 g_vos_vcc_10_los447.gif Figure 4. Output Voltage Swing vs Supply Voltage
LMV341 LMV342 LMV344 g_isr_vo_5_los447.gif Figure 6. Source Current vs Output Voltage
LMV341 LMV342 LMV344 g_isn_vo_5_los447.gif Figure 8. Sink Current vs Output Voltage
LMV341 LMV342 LMV344 g_vio_vic_5_los447.gif Figure 10. Offset Voltage vs Common-Mode Voltage
LMV341 LMV342 LMV344 g_vi_vo_135_los447.gif Figure 12. Input Voltage vs Output Voltage
LMV341 LMV342 LMV344 g_sr_ta_27_los447.gif Figure 14. Slew Rate vs Temperature
LMV341 LMV342 LMV344 g_cmrr_f_los447.gif Figure 16. CMRR vs Frequency
LMV341 LMV342 LMV344 g_vin_f_los447.gif Figure 18. Input Voltage Noise vs Frequency
LMV341 LMV342 LMV344 g_thd_vo_los447.gif Figure 20. Total Harmonic Distortion + Noise vs Output Voltage
LMV341 LMV342 LMV344 g_gpm_f_27rl_los447.gif
(RL = 600 Ω, 2 kΩ, 100 kΩ)
Figure 22. Gain and Phase Margin vs Frequency
LMV341 LMV342 LMV344 g_gpm_f_5cl_los447.gif
(CL = 0 pF, 100 pF, 500 pF, 1000 pF)
Figure 24. Gain and Phase Margin vs Frequency
LMV341 LMV342 LMV344 g_lsnir_n40_los447.gif Figure 26. Large-Signal Noninverting Response
LMV341 LMV342 LMV344 g_lsnir_25_los447.gif Figure 28. Large-Signal Noninverting Response
LMV341 LMV342 LMV344 g_lsnir_125_los447.gif Figure 30. Large-Signal Noninverting Response
LMV341 LMV342 LMV344 g_lsir_n40_los447.gif Figure 32. Large-Signal Inverting Response
LMV341 LMV342 LMV344 g_lsir_25_los447.gif Figure 34. Large-Signal Inverting Response
LMV341 LMV342 LMV344 g_lsir_125_los447.gif Figure 36. Large-Signal Inverting Response