JAJS706K April   2000  – August 2016 LMV710-N

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - 2.7 V
    6. 6.6 Electrical Characteristics - 3.2 V
    7. 6.7 Electrical Characteristics - 5 V
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Bypassing
      2. 7.3.2 Shutdown Mode
      3. 7.3.3 Rail-to-Rail Input
    4. 7.4 Device Functional Modes
      1. 7.4.1 Compensation of Input Capacitance
      2. 7.4.2 Capacitive Load Tolerance
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Current-Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Peak Detector
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 GSM Power Amplifier Control Loop
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Differential input voltage ±Supply voltage
Voltage at input or output pin (V–) − 0.4 (V+) + 0.4 V
Supply voltage (V+ - V −) 5.5 V
Output short circuit to V+ See(3)
Output short circuit to V− See(4)
Current at input pin ±10 mA
Mounting temperature, infrared or convection (20 sec) 235 °C
Junction temperature, TJ(MAX)(5) 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) Shorting circuit output to V+ will adversely affect reliability.
(4) Shorting circuit output to V− will adversely affect reliability.
(5) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – T A) / RθJA. All numbers apply for packages soldered directly into a PCB.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM)(1)(2) ±2000 V
Machine model (MM)(3) ±100
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) Human-body model, 1.5 kΩ in series with 100 pF.
(3) Machine model, 0 Ω in series with 100 pF.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage 2.7 5 V
Temperature –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) LMV710-N LMV711-N LMV715-N UNIT
DBV (SOT-23) DBV (SOT-23) DBV (SOT-23)
5 PINS 6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 265 265 265 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 131.6 139 156.6 °C/W
RθJB Junction-to-board thermal resistance 35.1 38.5 32.8 °C/W
ψJT Junction-to-top characterization parameter 22.2 28.6 34 °C/W
ψJB Junction-to-board characterization parameter 34.5 37.9 32.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics – 2.7 V

TJ = 25°C, V+ = 2.7 V, V− = 0 V, VCM = 1.35 V, and RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VOS Input offset voltage VCM = 0.85 V and
VCM = 1.85 V		 TJ = 25°C 0.4 3 mV
TJ = –40°C to 85°C 3.2
IB Input bias current 4 pA
CMRR Common-mode
rejection ratio		 0 V ≤ VCM ≤ 2.7 V TJ = 25°C 50 75 dB
TJ = –40°C to 85°C 45
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V,
VCM = 0.85 V		 TJ = 25°C 70 110 dB
TJ = –40°C to 85°C 68
2.7 V ≤ V+ ≤ 5 V,
VCM = 1.85 V		 TJ = 25°C 70 95
TJ = –40°C to 85°C 68
VCM Input common-mode voltage range For CMRR ≥ 50 dB V– –0.2 –0.3 V
V+ 3 2.9
ISC Output short-circuit current Sourcing, VO = 0 V TJ = 25°C 15 28 mA
TJ = –40°C to 85°C 12
Sinking, VO = 2.7 V TJ = 25°C 25 40
TJ = –40°C to 85°C 22
VO Output swing RL = 10 kΩ to 1.35 V
VID = 100 mV		 TJ = 25°C 2.62 2.68 V
TJ = –40°C to 85°C 2.6
RL = 10 kΩ to 1.35 V
VID = –100 mV		 TJ = 25°C 0.01 0.12
TJ = –40°C to 85°C 0.15
RL = 600 Ω to 1.35 V
VID = 100 mV		 TJ = 25°C 2.52 2.55
TJ = –40°C to 85°C 2.5
RL = 600 Ω to 1.35 V
VID = –100 mV		 TJ = 25°C 0.05 0.23
TJ = –40°C to 85°C 0.3
VO(SD) Output voltage level in
shutdown mode		 LMV711 only 50 200 mV
IO(SD) Output leakage current in
shutdown mode		 LMV715 only 1 pA
CO(SD) Output capacitance in
shutdown mode		 LMV715 only 32 pF
IS Supply current ON mode TJ = 25°C 1.22 1.7 mA
TJ = –40°C to 85°C 1.9
Shutdown mode, VSD = 0 V 0.002 10 µA
AV Large signal voltage Sourcing, RL = 10 kΩ,
VO = 1.35 V to 2.3 V		 TJ = 25°C 80 115 dB
TJ = –40°C to 85°C 76
Sinking, RL = 10 kΩ,
VO = 0.4 V to 1.35 V		 TJ = 25°C 80 113
TJ = –40°C to 85°C 76
Sourcing, RL = 600 Ω,
VO = 1.35 V to 2.2 V		 TJ = 25°C 80 110
TJ = –40°C to 85°C 76
Sinking, RL = 600 Ω,
VO = 0.5 V to 1.35 V		 TJ = 25°C 80 100
TJ = –40°C to 85°C 76
SR Slew rate(3) 5 V/µs
GBWP Gain-bandwidth product 5 MHz
φm Phase margin 60 °
TON Turnon time from shutdown <10 µs
VSD Shutdown pin voltage range ON mode 2.4 1.5 2.7 V
Shutdown mode 0 1 0.8
en Input-referred voltage noise f = 1 kHz 20 nV/√Hz
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Number specified is the slower of the positive and negative slew rates.

6.6 Electrical Characteristics – 3.2 V

TJ = 25°C, V+ = 3.2 V, V− = 0 V, and VCM = 1.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VO Output Swing IO = 6.5 mA TJ = 25°C 2.95 3 V
TJ = –40°C to 85°C 2.92
TJ = 25°C 0.01 0.18
TJ = –40°C to 85°C 0.25
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.

6.7 Electrical Characteristics – 5 V

TJ = 25°C, V+ = 5 V, V− = 0 V, VCM = 2.5 V, and RL > 1 MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VOS Input offset voltage VCM = 0.85 V and
VCM = 1.85 V		 TJ = 25°C 0.4 3 mV
TJ = –40°C to 85°C 3.2
IB Input bias current 4 pA
CMRR Common-mode
rejection ratio		 0 V ≤ VCM ≤ 5 V TJ = 25°C 50 70 dB
TJ = –40°C to 85°C 48
PSRR Power supply rejection ratio 2.7 V ≤ V+ ≤ 5 V,
VCM = 0.85 V		 TJ = 25°C 70 110 dB
TJ = –40°C to 85°C 68
2.7 V ≤ V+ ≤ 5 V,
VCM = 1.85 V		 TJ = 25°C 70 95
TJ = –40°C to 85°C 68
VCM Input common-mode
voltage range		 For CMRR ≥ 50 dB V– –0.2 –0.3 V
V+ 5.3 5.2
ISC Output short-circuit current Sourcing, VO = 0 V TJ = 25°C 25 35 mA
TJ = –40°C to 85°C 21
Sinking, VO = 5 V TJ = 25°C 25 40
TJ = –40°C to 85°C 21
VO Output swing RL = 10 kΩ to 2.5 V
VID = 100 mV		 TJ = 25°C 4.92 4.98 V
TJ = –40°C to 85°C 4.9
RL = 10 kΩ to 2.5 V
VID = –100 mV		 TJ = 25°C 0.01 0.12
TJ = –40°C to 85°C 0.15
RL = 600 Ω to 2.5 V
VID = 100 mV		 TJ = 25°C 4.82 4.85
TJ = –40°C to 85°C 4.8
RL = 600 Ω to 2.5 V
VID = –100 mV		 TJ = 25°C 0.05 0.23
TJ = –40°C to 85°C 0.3
VO(SD) Output voltage level in
shutdown mode		 LMV711 only 50 200 mV
IO(SD) Output leakage current in
shutdown mode		 LMV715 only 1 pA
CO(SD) Output capacitance in
shutdown mode		 LMV715 only 32 pF
IS Supply current ON mode TJ = 25°C 1.17 1.7 mA
TJ = –40°C to 85°C 1.9
Shutdown mode 0.2 10 µA
AV Large signal voltage gain Sourcing, RL = 10 kΩ,
VO = 2.5 V to 4.6 V		 TJ = 25°C 80 123 dB
TJ = –40°C to 85°C 76
Sinking, RL = 10 kΩ,
VO = 0.4 V to 2.5 V		 TJ = 25°C 80 120
TJ = –40°C to 85°C 76
Sourcing, RL = 600 Ω,
VO = 2.5 V to 4.5 V		 TJ = 25°C 80 110
TJ = –40°C to 85°C 76
Sinking, RL = 600 Ω,
VO = 0.5 V to 2.5 V		 TJ = 25°C 80 118
TJ = –40°C to 85°C 76
SR Slew rate(3) 5 V/µs
GBWP Gain-bandwidth product 5 MHz
φm Phase margin 60 °
TON Turnon time from shutdown <10 µs
VSD Shutdown pin voltage range ON mode 2.4 2 5 V
Shutdown mode 0 1.5 0.8
en Input-referred voltage noise f = 1 kHz 20 nV/√Hz
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Number specified is the slower of the positive and negative slew rates.

6.8 Typical Characteristics

VS = 5 V, single supply, TA = 25°C (unless otherwise noted)
LMV710-N LMV711-N LMV715-N 10132527.png
Figure 1. Supply Current
vs Supply Voltage (ON Mode)
LMV710-N LMV711-N LMV715-N 10132529.png
Figure 3. Output Positive Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132531.png
Figure 5. Output Positive Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132533.png
Figure 7. Output Positive Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132535.png
Figure 9. Input Voltage Noise vs Frequency
LMV710-N LMV711-N LMV715-N 10132537.png
Figure 11. CMRR vs Frequency
LMV710-N LMV711-N LMV715-N 10132539.png
Figure 13. Sourcing Current vs Output Voltage
LMV710-N LMV711-N LMV715-N 10132541.png
Figure 15. Thd+N vs Frequency (VS = 5 V)
LMV710-N LMV711-N LMV715-N 10132543.png
Figure 17. Thd+N vs VOUT
LMV710-N LMV711-N LMV715-N 10132545.png
Figure 19. CCM vs VCM
LMV710-N LMV711-N LMV715-N 10132547.png
Figure 21. CDIFF vs VCM (VS = 2.7 V)
LMV710-N LMV711-N LMV715-N 10132512.png
Figure 23. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132511.png
Figure 25. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132509.png
Figure 27. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132503.png
Figure 29. Noninverting Large
Signal Pulse Response
LMV710-N LMV711-N LMV715-N 10132504.png
Figure 31. Inverting Large-Signal Pulse Response
LMV710-N LMV711-N LMV715-N 10132549.png
Figure 33. VOS vs VCM
LMV710-N LMV711-N LMV715-N 10132528.png
Figure 2. LMV711, LMV715 Supply Current
vs Supply Voltage (Shutdown Mode)
LMV710-N LMV711-N LMV715-N 10132530.png
Figure 4. Output Negative Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132532.png
Figure 6. Output Negative Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132534.png
Figure 8. Output Negative Swing vs Supply Voltage
LMV710-N LMV711-N LMV715-N 10132536.png
Figure 10. PSRR vs Frequency
LMV710-N LMV711-N LMV715-N 10132538.png
Figure 12. LMV711 and LMV715 Turnon Characteristics
LMV710-N LMV711-N LMV715-N 10132540.png
Figure 14. Sinking Current vs Output Voltage
LMV710-N LMV711-N LMV715-N 10132542.png
Figure 16. Thd+N vs Frequency (VS = 2.7 V)
LMV710-N LMV711-N LMV715-N 10132544.png
Figure 18. Thd+N vs VOUT
LMV710-N LMV711-N LMV715-N 10132546.png
Figure 20. CCM vs VCM
LMV710-N LMV711-N LMV715-N 10132548.png
Figure 22. CDIFF vs VCM (VS = 5 V)
LMV710-N LMV711-N LMV715-N 10132510.png
Figure 24. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132507.png
Figure 26. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132508.png
Figure 28. Open-Loop Frequency Response
LMV710-N LMV711-N LMV715-N 10132502.png
Figure 30. Noninverting Small
Signal Pulse Response
LMV710-N LMV711-N LMV715-N 10132505.png
Figure 32. Inverting Small-Signal Pulse Response
LMV710-N LMV711-N LMV715-N 10132550.png
Figure 34. VOS vs VCM