JAJSF93 April   2018 LMV7239-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      消費電流と電源電圧との関係
      2.      伝搬遅延とオーバードライブ
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, 2.7 V
    6. 6.6 Electrical Characteristics, 5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage: LMV7239-Q1
    4. 7.4 Device Functional Modes
      1. 7.4.1 Capacitive and Resistive Loads
      2. 7.4.2 Noise
      3. 7.4.3 Hysteresis
        1. 7.4.3.1 Inverting Comparator With Hysteresis
        2. 7.4.3.2 Non-Inverting Comparator With Hysteresis
      4. 7.4.4 Zero Crossing Detector
        1. 7.4.4.1 Zero Crossing Detector With Hysteresis
      5. 7.4.5 Threshold Detector
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Square Wave Oscillator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Crystal Oscillator
      3. 8.2.3 Infrared (IR) Receiver
      4. 8.2.4 Window Detector
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.1 Layout Guidelines

Proper grounding and the use of a ground plane will help to ensure the specified performance of the LMV7239-Q1. Minimizing trace lengths, reducing unwanted parasitic capacitance and using surface-mount components will also help. Comparators are very sensitive to input noise.

The LMV7239-Q1 requires a high-speed layout. Follow these layout guidelines:

  1. Use printed-circuit board with a good, unbroken low-inductance ground plane.
  2. Place a decoupling capacitor (0.1-µF, ceramic surface-mount capacitor) as close as possible to VCC pin.
  3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from output.
  4. Solder the device directly to the printed-circuit board rather than using a socket.
  5. For slow moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to tPD when the source impedance is low.
  6. The top-side ground plane runs between the output and inputs.
  7. Ground trace from the ground pin runs under the device up to the bypass capacitor, shielding the inputs from the outputs.