8.2.1 Square Wave Oscillator

Figure 35. Square Wave Oscillator Application

8.2.1.2 Detailed Design Procedure

To analyze the circuit, consider it when the output is high. That implies that the inverted input (V_C) is lower than the noninverting input (V_A).

Figure 36. Squarewave Oscillator Timing Thresholds

This causes the C₁ to get charged through R_4, and the voltage V_C increases till it is equal to the noninverting input. The value of V_A at this point is

Equation 8.

If R₁ = R₂ = R₃, then V_A1 = 2V_CC/3

At this point the comparator switches pulling down the output to the negative rail. The value of V_A at this point is

Equation 9.

If R₁ = R₂ = R₃, then V_A2 = V_CC/3

The capacitor C₁ now discharges through R₄, and the voltage V_C decreases till it is equal to V_A2, at which point the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C₁ from 2V_CC/3 to V_CC/3, which is given by R₄C₁.ln2. Hence the formula for the frequency is:

F = 1/(2·R₄·C₁·ln2)

8.2.1.3 Application Curve

Figure Figure 37 shows the simulated results of an oscillator using the following values:

1. R₁ = R₂ = R₃ = R₄ = 100 kΩ
2. C₁ = 750 pF, C_L = 20 pF
3. V+ = 5 V, V- = GND
4. C_STRAY (not shown) from Va to GND = 10 pF

Figure 37. Square Wave Oscillator Output Waveforms

8.2.2 Positive Peak Detector

Figure 38. Positive Peak Detector

The positive peak detect circuit is basically a comparator operated in a unity gain follower configuration, with a capacitor as a load to store the highest voltage. A diode is added at the output to prevent the capacitor from discharging through the pullup resistor. When the input V_IN increases, the inverting input of the comparator follows it, thus charging the capacitor. When the input voltage decreases, the cap discharges through the 1-MΩ resistor.

The decay time can be modified by changing R2. The output should be accessed through a high-impedance input follower circuit to prevent loading. Upper output swing headroom is determined by the forward voltage of the diode (V_MAX = V_CC – V_F). A Shottky signal diode can be used to reduce the required headroom to around 300 mV.

This circuit can use any of the LMV727x devices, but R1 is not required for the LMV7271 or LMV7272.

8.2.3 Negative Peak Detector

Figure 39. Negative Peak Detector (LMV7275 Only)

The Negative Peak Detector circuit will store the peak negative voltage below ground ( 0 V to –V_CC). For the negative detector, the LMV7275 must be used because the output transistor acts as a low-impedance current sink. Because there is no pullup resistor, the only discharge path will be the 1-MΩ resistor and any load impedance used. Decay time is changed by varying the 1-MΩ resistor.

8.2.4 Window Detector

Figure 40. Window Detector

A window detector monitors the input signal to determine if it falls between two voltage levels. Both outputs are true (high) when V_REF1 < V_IN < V_REF2

Figure 41. Window Detector Output Signal

The comparator outputs A and B are high only when V_REF1 < V_IN < V_REF2, or within the window, where these are defined as:

To determine if the input signal falls outside of the two voltage levels, both inputs on each comparators can be reversed to invert the logic.

The LMV7275 with an open-drain output should be used if the outputs are to be tied together for a common logic output.

Other names for window detectors are: threshold detector, level detector, and amplitude trigger or detector.