JAJSB26I February 2010 – March 2022 LMZ12010
PRODUCTION DATA
The LMZ12010 is protected by both low-side (LS) and high-side (HS) current limit circuitry. The LS current limit detection is carried out during the off time by monitoring the current through the LS synchronous MOSFET. Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows through the load, the PGND pin, and the internal synchronous MOSFET. If this current exceeds 13 A (typical), the current limit comparator disables the start of the next switching period. Switching cycles are prohibited until current drops below the limit.
DC current limit is dependent on duty cycle as illustrated in the graph in Section 6.6.
The HS current limit monitors the current of top-side MOSFET. Once HS current limit is detected (16 A typical), the HS MOSFET is shut off immediately until the next cycle. Exceeding HS current limit causes VOUT to fall. Typical behavior of exceeding LS current limit is that fSW drops to 1/2 of the operating frequency.