JAJSG01D June   2012  – August 2018 LMZ20502

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      VOUT = 1.8V、自動モードでの標準的な効率
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Nano Scale Package
      2. 7.3.2 Internal Synchronous Rectifier
      3. 7.3.3 Current Limit Protection
      4. 7.3.4 Start-Up
      5. 7.3.5 Dropout Behavior
      6. 7.3.6 Power Good Flag Function
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Operation
      2. 7.4.2 PFM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Setting The Output Voltage
        3. 8.2.1.3 Output and Feed-Forward Capacitors
        4. 8.2.1.4 Input Capacitors
        5. 8.2.1.5 Maximum Ambient Temperature
        6. 8.2.1.6 Options
      2. 8.2.2 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Soldering Information
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 開発サポート
        1. 11.1.2.1 WEBENCH®ツールによるカスタム設計
      3. 11.1.3 ドキュメントのサポート
        1. 11.1.3.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • SIL|8
サーマルパッド・メカニカル・データ
発注情報

6.6 System Characteristics

The following specifications apply to the circuit found in Figure 16 with the appropriate modifications from Table 2. These parameters are not tested in production and represent typical performance only. Unless otherwise stated the following conditions apply: TA = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Load Regulation Percent output voltage change for the given load current change VOUT = 1.2 V,
VIN = 5 V, IOUT = 0 A to 2 A, PWM		 0.4%
VOUT = 1.8 V
VIN = 5 V, IOUT = 0 A to 2 A, PWM		 0.4%
VOUT = 3.3 V
VIN = 5 V, IOUT = 0 A to 2 A, PWM		 0.2%
Line Regulation Percent output voltage change for the given change in input voltage VOUT = 1.2 V
IOUT = 2 A, VIN = 3 V to 5 V, PWM 		0.2%
VOUT = 1.8 V
IOUT = 2 A, VIN = 3 V to 5 V, PWM		 0.15%
VOUT = 3.3 V
IOUT = 2 A,VIN = 4 V to 5 V, PWM		 0.18%
VR-PWM Output voltage ripple in PWM VOUT = 1.2 V
IOUT = 1 A, VIN = 5 V, PWM		 3.3 mV pk-pk
VOUT = 1.8 V
IOUT = 1 A, VIN = 5 V, PWM		 3.3
VOUT = 3.3V
IOUT= 1 A, VIN = 5 V, PWM		 4.2
VR-PFM Output voltage ripple in PFM VOUT = 1.2V
IOUT= 1 mA, VIN = 3 V, PFM		 22 mV pk-pk
VOUT = 1.8 V
IOUT= 1 mA, VIN=3 V, PFM		 22
VOUT = 3.3 V
IOUT = 1 mA, VIN = 5 V, PFM		 40
Load Transient Output voltage deviation from nominal due to a load current step VOUT = 1.2 V
VIN = 5 V, IOUT = 0 A to 2 A, Tr = Tf = 2 µs, PWM		 ±115 mV
VOUT = 1.8 V
VIN = 5 V, IOUT = 0 A to 2 A, Tr = Tf = 2 µs, PWM		 ±100
VOUT = 3.3 V
VIN = 5 V, IOUT = 0 A to 2 A, Tr = Tf = 2 µs, PWM		 ±150
Line Transient Output voltage deviation due to an input voltage step VOUT = 1.2V
IOUT = 1 A, VIN = 3 V to 5 V, Tr = Tf = 50 µs, PWM		 25 mV pk-pk
VOUT = 1.8 V
IOUT = 1 A, VIN = 3 V to 5 V, Tr = Tf = 50 µs, PWM		 30
VOUT = 3.3 V
IOUT = 1 A, VIN = 4 V to 5 V, Tr = Tf = 50 µs, PWM		 20
η Peak efficiency VOUT = 1.2 V
VIN = 3 V		 87%
VOUT = 1.8 V
VIN = 3 V		 91%
VOUT = 3.3 V
VIN = 4.2 V		 94%
Full load efficiency VOUT = 1.2 V
VIN = 3 V, IOUT = 2 A		 74%
VOUT = 1.8 V
VIN = 3 V, IOUT = 2 A		 79%
VOUT = 3.3 V
VIN = 4.2 V, IOUT = 2 A		 89%