JAJSEO9D December   2017  – August 2020 LMZM33602

PRODUCTION DATA  

  1. 1特長
  2. 2アプリケーション
  3. 3概要
  4. 4Revision History
  5. 5Pin Configuration and Functions
    1.     Pin Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics (VIN = 5 V)
    8. 6.8 Typical Characteristics (VIN = 12 V)
    9. 6.9 Typical Characteristics (VIN = 24 V)
  7. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Feedforward Capacitor, CFF
      3. 7.3.3  Voltage Dropout
      4. 7.3.4  Switching Frequency (RT)
      5. 7.3.5  Synchronization (SYNC)
      6. 7.3.6  Input Capacitors
      7. 7.3.7  Output Capacitors
      8. 7.3.8  Output On/Off Enable (EN)
      9. 7.3.9  Programmable Undervoltage Lockout (UVLO)
      10. 7.3.10 Power Good (PGOOD)
      11. 7.3.11 Overcurrent Protection (OCP)
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Feedforward Capacitor (CFF)
        4. 8.2.2.4 Setting the Switching Frequency
        5. 8.2.2.5 Input Capacitors
        6. 8.2.2.6 Output Capacitor Selection
        7. 8.2.2.7 Application Curves
  9. 9Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 用語集

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 AGND G Analog ground. Zero voltage reference for internal references and logic. Do not connect this pin to PGND; the connection is made internal to the device. See the Section 9 of the data sheet for a recommended layout.
2 EN/SYNC I EN - Enable input to regulator. High = On, Low = Off. Can be connected to VIN. Do not float. This pin can be used to set the input undervoltage lockout with two resistors. See Section 7.3.9. SYNC - The internal oscillator can be synchronized to an external clock via AC-coupling. See Section 7.3.5 for details.
3 RT I An external timing resistor connected between this pin and AGND adjusts the switching frequency of the device. If left open, the default switching frequency is 400 kHz.
4 VIN I Input supply voltage. Connect external input capacitors between this pin and PGND.
5, 14, 15, 18 PGND G Power ground. This is the return current path for the power stage of the device. Connect pin 5 to the input source, the load, and to the bypass capacitors associated with VIN and VOUT using power ground planes on the PCB. Pins 14 and 15 are not connected to PGND internal to the device and must be connected to PGND at pad 18. Connect pad 18 to the power ground planes using multiple vias for good thermal performance. See Section 9 of the data sheet for a recommended layout.
6, 7, 8 VOUT O Output voltage. These pins are connected to the internal output inductor. Connect these pins to the output load and connect external bypass capacitors between these pins and PGND.
9, 10, 11 SW O Switch node. Connect these pins to a small copper island under the device for thermal relief. Do not place any external component on these pins or tie them to a pin of another function.
12, 13 DNC — Do not connect. Each pin must be soldered to an isolated pad. These pins connect to internal circuitry. Do not connect these pins to one another, AGND, PGND, or any other voltage.
16 FB I Feedback input. Connect the center point of the feedback resistor divider to this pin. Connect the upper resistor (RFBT) of the feedback divider to VOUT at the desired point of regulation. Connect the lower resistor (RFBB) of the feedback divider to AGND.
17 PGOOD O Open drain output for power-good flag. Use a 10-kΩ to 100-kΩ pullup resistor to logic rail or other DC voltage no higher than 12 V.