JAJSPI9G June   2011  – April 2024 LP2951-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ERROR Function
      2. 6.3.2 Programming Output Voltage
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Input Capacitor (CIN)
        2. 7.2.1.2 Output Capacitor (COUT)
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Capacitance Value
        2. 7.2.2.2 Capacitor Types
        3. 7.2.2.3 CBYPASS: Noise and Stability Improvement
        4. 7.2.2.4 ESR Range
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.1 ERROR Function

The LP2951-Q1 has a low-voltage detection comparator that outputs a logic low when the output voltage drops by approximately 6% from the nominal value, and outputs a logic high when VOUT has reached approximately 95% of the nominal value. This 95% of nominal figure is obtained by dividing the built-in offset of approximately 60 mV by the 1.235-V band-gap reference, and remains independent of the programmed output voltage. For example, the trip-point threshold (ERROR output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a hysteresis of 15 mV between the thresholds for a high and low ERROR output.

A timing diagram is shown in Figure 6-1 for ERROR vs VOUT (5 V), as VIN is ramped up and down. ERROR becomes valid (low) when VIN is approximately 1.3 V. When VIN is approximately 5 V, VOUT = 4.75 V, causing ERROR to go high. Because the dropout voltage is load dependent, the output trip-point threshold is reached at different values of VIN, depending on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of VIN, and vice versa for lower load current. The output-voltage trip point remains at approximately 4.75 V, regardless of the load. When VIN ≤ 1.3 V, the ERROR comparator output is turned off and pulled high to the pullup voltage. If VOUT is used as the pullup voltage, rather than an external 5-V source, ERROR typically is approximately 1.2 V. In this condition, an equal resistor divider (10 kΩ is acceptable) can be tied to ERROR to divide down the voltage to a valid logic low during any fault condition, while still enabling a logic high during normal operation.

GUID-E1B53230-CC9E-4432-AA66-E6985A0A22F3-low.gifFigure 6-1 ERROR Output Timing

Because the ERROR comparator has an open-collector output, an external pullup resistor is required to pull the output up to VOUT or another supply voltage (up to 30 V). The output of the comparator is rated to sink up to 400 μA. An acceptable range of values for the pullup resistor is from 100 kΩ to 1 MΩ. If ERROR is not used, this pin can be left open.