JAJSI22B July   2019  – November 2019 LP3470A

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      基本的な動作回路
      2.      LP3470A の標準的な消費電流
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 RESET Time-Out Period
      2. 8.3.2 RESET Output
      3. 8.3.3 Pull-up Resistor Selection
      4. 8.3.4 VCC Transient Immunity
    4. 8.4 Device Functional Modes
      1. 8.4.1 RESET Output Low
      2. 8.4.2 RESET Output High
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

At 0.95 V ≤ VCC ≤ 10 V, SRT = Open, RESET pull-up resistor (Rpull-up) = 100 kΩ to VCC, output reset load (CLOAD) = 10 pF and over the operating free-air temperature range – 40°C to 125°C, unless otherwise noted. Typical values are at TJ = 25°C. 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC Input supply voltage 0.95 10 V
VIT- Negative-going input threshold accuracy -40°C to 125°C –1.5 1 1.5 %
VHYS Hysteresis on VIT- pin VIT- = 3.08 V to 4.63 V 175 200 225 mV
VHYS Hysteresis on VIT- pin VIT- = 2.64 V to 2.93 V 75 100 125 mV
ICC Supply current into VCC pin VCC = 0.95 V  < VCC < 10 V
VCC > VIT+(1)
TA = -40°C to 125°C		 0.3 1 µA
RSRT SRT pin internal resistance (3) 350 500 650 kΩ
VPOR Power on Reset Voltage(2) VOL(max) = 0.2 V
IOUT (Sink) = 5.6 uA		 950 mV
VOL Low level output voltage
 		 1.5 V < VCC < 5 V
VCC < VIT-
IOUT(Sink) = 2 mA		 200 mV
Ilkg(OD) Open-Drain output leakage current RESET pin in High Impedance,
VCC = VRESET = 5.5 V
VIT+ < VCC 		90 nA
(1) VIT+ = VHYS + VIT-
(2) VPOR is the minimum VDD voltage level for a controlled output state. VDD slew rate  ≤ 100mV/µs
(3) This parameter is guranteed by design and characterization