SNVS324K January   2005  – January 2016 LP38691-ADJ , LP38691-ADJ-Q1 , LP38693-ADJ , LP38693-ADJ-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LP38691-ADJ, LP38693-ADJ
    3. 6.3 ESD Ratings: LP38691-ADJ-Q1, LP38693-ADJ-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Thermal Overload Protection (TSD)
      3. 7.3.3 Foldback Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Setting the Output Voltage
        2. 8.2.2.2  External Capacitors
        3. 8.2.2.3  Input Capacitor
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Capacitor Characteristics
          1. 8.2.2.5.1 Ceramic Capacitors
          2. 8.2.2.5.2 Tantalum Capacitors
        6. 8.2.2.6  RFI/EMI Susceptibility
        7. 8.2.2.7  Output Noise
        8. 8.2.2.8  Power Dissipation
        9. 8.2.2.9  Estimating Junction Temperature
        10. 8.2.2.10 Reverse Voltage
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Wide Input Voltage Range: 2.7 V to 10 V
  • All WSON Options are Available as AEC-Q100 Grade 1
  • Output Voltage Range: 1.25 V to 9 V
  • 2% Adjust (ADJ) Pin Voltage Accuracy (25°C)
  • Low Dropout Voltage: 250 mV at 500 mA
    (Typical, 5-V Out)
  • Precision (Trimmed) Bandgap Reference
  • Ensured Specs for –40°C to +125°C
  • 1-µA Off-State Quiescent Current
  • Thermal Overload Protection
  • Foldback Current Limiting
  • Ground (GND) Pin Current: 55 µA (Typical) at Full Load
  • Enable (EN) Pin (LP38693-ADJ)

2 Applications

  • Hard Disk Drives
  • Notebook Computers
  • Battery-Powered Devices
  • Portable Instrumentation

3 Description

The LP3869x-ADJ low-dropout CMOS linear regulators provide 2% precision reference voltage, extremely low dropout voltage (250 mV at 500-mA load current, VOUT = 5 V), and excellent AC performance using ultra-low equivalent series resistance (ESR) ceramic output capacitors.

The low thermal resistance of the WSON and SOT-223 packages allow use of the full operating current even in high ambient temperature environments.

The use of a PMOS power transistor means that no DC base drive current is required to bias it, thus allowing the GND-pin current to remain below 100 µA regardless of load current, input voltage, or operating temperature.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP38691-ADJ WSON (6) 3.00 mm × 3.00 mm
LP38693-ADJ SOT-223 (5) 6.50 mm × 3.56 mm
WSON (6) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuits

LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126801.gif
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126802.gif
VOUT = VADJ × (1 + R1/R2)
* Minimum value required for stability