SNVS159H October   2001  – July 2015 LP3981

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On/Off Input Operation
      2. 8.3.2 Fast On-Time
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VOUT(TARGET) + 0.3 V ≤ VIN ≤ 6 V
      2. 8.4.2 Operation With EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Dissipation and Device Operation
        2. 9.2.2.2 External Capacitors
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 No-Load Stability
        6. 9.2.2.6 Noise Bypass Capacitor
        7. 9.2.2.7 Capacitor Characteristics
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
IN, EN −0.3 6.5 V
OUT, OUT-SENSE −0.3 to VIN + 0.3 6.5 V
Junction temperature 150 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to the potential at the GND pin.
(3) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Machine model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN NOM MAX UNIT
VIN 2.7 6 V
VEN 0 VIN V
Junction temperature –40 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to the potential at the GND pin.

6.4 Thermal Information

THERMAL METRIC(1) LP3981 UNIT
DGK (VSSOP) NGC (WSON)
8 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance, High K 177 56.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 67.7 76.8 °C/W
RθJB Junction-to-board thermal resistance 97.4 30.9 °C/W
ψJT Junction-to-top characterization parameter 10.8 3.3 °C/W
ψJB Junction-to-board characterization parameter 96 31 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 10.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise specified: VEN = 1.2 V, VIN = VOUT + 0.5 V, CIN = 2.2 µF, CBP = 0.033 µF, IOUT = 1 mA, COUT = 2.2 µF. All values are for TJ = 25°C, unless otherwise specified.(1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ΔVOUT Output voltage tolerance −2 2 % of
VOUT(nom)
TJ = –40°C to +125°C –3 3
Line regulation error VIN = VOUT + 0.5 V to 6 V, TA < 85°C −0.1 0.005 0.1 %/V
VIN = VOUT + 0.5 V to 6 V, TJ ≤125°C –0.2 0.2
Load regulation error(3) IOUT = 1 mA to 300 mA 0.0003 %/mA
IOUT = 1 mA to 300 mA
TJ = –40°C to +125°C		 0.005
PSRR Power supply rejection ratio(4) VIN = VOUT(nom) + 1 V,
ƒ = 1 kHz,
IOUT = 50 mA (Figure 16)		 50 dB
VIN = VOUT(nom) + 1 V,
ƒ = 10 kHz,
IOUT = 50 mA (Figure 16)		 55
IQ Quiescent current VEN = 1.2 V, IOUT = 1 mA 70 µA
VEN = 1.2 V, IOUT = 1 mA
TJ = –40°C to +125°C		 120
VEN = 1.2 V, IOUT = 1 mA to 300 mA,
VOUT = 2.5 V(5)		 170
VEN = 1.2 V, IOUT = 1 mA to 300 mA,
VOUT = 2.5 V
TJ = –40°C to +125°C(5)		 210
VEN = 0.4 V 0.003
VEN = 0.4 V, TJ = –40°C to +125°C 1.5
Dropout voltage (6) IOUT = 1 mA 0.5 mV
IOUT = 1 mA, TJ = –40°C to +125°C 5
IOUT = 200 mA 88
IOUT = 200 mA, TJ = –40°C to +125°C 133
IOUT = 300 mA 132
IOUT = 300 mA, TJ = –40°C to +125°C 200
ISC Short-circuit current limit Output grounded (steady state) 600 mA
en Output noise voltage BW = 10 Hz to 100 kHz,
CBP = 0.033 µF		 35 µVRMS
TSD Thermal shutdown temperature 160 °C
Thermal shutdown hysteresis 20
IOUT(PK) Peak output current VOUT ≥ VOUT (nom) – 5% 300 455 mA
IEN Maximum input current at VEN VEN = 0 and VIN 0.001 µA
VIL Logic low input threshold VIN = 2.7 V to 6 V, TJ = –40°C to +125°C 0.4
VIH Logic high input threshold VIN = 2.7 V to 6 V, TJ = –40°C to +125°C 1.4
OUTPUT CAPACITANCE
COUT Output capacitor Capacitance 2.2 22 µF
ESR 5 500 mΩ
(1) Minimum (MIN) and maximum (MAX) limits are ensured by design, test, or statistical analysis. Typical (TYP) numbers are not verified, but do represent the most likely norm.
(2) The target output voltage, which is labeled VOUT(nom), is the desired voltage option.
(3) An increase in the load current results in a slight decrease in the output voltage and vice versa.
(4) Specified by design. Not production tested.
(5) For VOUT > 2.5 V, increase IQ(MAX) by 2.5 µA for every 0.1 V increase in VOUT(nom); that is,
IQ(MAX) = 210 µA + ((VOUT(NOM) – 2.5) × 25) µA .
(6) Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply for input voltages below 2.5 V.

6.6 Timing Requirements

MIN NOM MAX UNIT
tON Turnon time (1)(2)
CBYPASS = 0.033 µF		 240 µs
CBYPASS = 0.033 µF, TJ = –40°C to +125°C 350
(1) Specified by design. Not production tested.
(2) Turnon time is time measured between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value.

6.7 Typical Characteristics

Unless otherwise specified, CIN = COUT = 2.2 µF ceramic, CBP = 0.033 µF, VIN = VOUT + 0.5 V, TA = 25°C, EN pin is tied to VIN.
LP3981 20020317.png
VOUT = 2.83 V
Figure 1. Output Voltage vs. Temperature
LP3981 20020319.png
VOUT = 2.85 V
Figure 3. Ground Current vs. Load Current
LP3981 20020332.png
Figure 5. Output Short Circuit Current
LP3981 20020322.png
VIN = VOUT + 1 V
Figure 7. Ripple Rejection
LP3981 20020324.png
VIN = 3.5 V
Figure 9. Load Transient Response
LP3981 20020326.png
VIN = VOUT + 1 V To VOUT + 1.6 V
Figure 11. Line Transient Response
LP3981 20020330.png
Figure 13. Enable Response (tON)
LP3981 20020318.png
VOUT = 2.85 V
Figure 2. Dropout Voltage vs. Temperature
LP3981 20020320.png
Figure 4. Output Short Circuit Current
LP3981 20020321.png
VIN = VOUT + 1 V
Figure 6. Ripple Rejection
LP3981 20020323.png
VIN = VOUT + 1 V
Figure 8. Ripple Rejection
LP3981 20020325.png
VIN = 3.5 V
Figure 10. Load Transient Response
LP3981 20020327.png
VIN = VOUT + 1 V to VOUT + 1.6 V
Figure 12. Line Transient Response
LP3981 20020331.png
Figure 14. Enable Response (tON)