JAJSCR1 November   2016 LP5922

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Input and Output Capacitors
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage
      2. 7.3.2 Enable
      3. 7.3.3 Output Automatic Discharge
      4. 7.3.4 Programmable Soft Start and Noise Reduction
      5. 7.3.5 Internal Current Limit
      6. 7.3.6 Thermal Overload Protection
      7. 7.3.7 Power Good Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Undervoltage Lockout (UVLO)
      3. 7.4.3 Minimum Operating Input Voltage
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor, CIN
        3. 8.2.2.3 Output Capacitor, COUT
        4. 8.2.2.4 Soft-Start and Noise-Reduction Capacitor, CSS/NR
        5. 8.2.2.5 Feed-Forward Capacitor, CFF
        6. 8.2.2.6 No-Load Stability
        7. 8.2.2.7 Power Dissipation
        8. 8.2.2.8 Estimating Junction Temperature
        9. 8.2.2.9 Recommended Continuous Operating Area
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DSC Package
10-Pin WSON With Thermal Pad
Top View
LP5922 pinout_snvsag0.gif

Pin Functions

PIN I/O DESCRIPTION
NUMBER NAME
1 OUT O Regulated output voltage, connect directly to pin 2
2 OUT O Regulated output voltage, connect directly to pin 1
3 FB I Voltage feedback input to the internal error amplifier
4 GND Ground Ground; connect to device pin 8.
5 PG O Power Good to indicate the status of output voltage. Requires an external pull-up resistor. When PG pin voltage is high the output voltage is considered good.
6 EN I Enable
7 SS/NR I/O Soft-start and noise reduction pin
8 GND Ground Ground —connect to device pin 4.
9 IN I Supply voltage input — connect directly to pin 10.
10 IN I Supply voltage input —connect directly to pin 9.
Exposed pad Thermal Pad — The exposed thermal pad on the bottom of the package must be connected to a copper area under the package on the PCB. Connect to ground potential. Do not connect to any potential other than the same ground potential seen at device pins 4 and 8 (GND). See Power Dissipation for more information.