JAJSLV6 April   2021 LP8758-EA

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Serial Bus Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Buck Information
        1. 7.1.1.1 Operating Modes
        2. 7.1.1.2 Programmability
        3. 7.1.1.3 特長
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overview
        1. 7.3.1.1 Transition Between PWM and PFM Modes
        2. 7.3.1.2 Buck Converter Load Current Measurement
        3. 7.3.1.3 Spread-Spectrum Mode
      2. 7.3.2 Power-Up
      3. 7.3.3 Regulator Control
        1. 7.3.3.1 Enabling and Disabling
        2. 7.3.3.2 Changing Output Voltage
      4. 7.3.4 Device Reset Scenarios
      5. 7.3.5 Diagnosis and Protection Features
        1. 7.3.5.1 Warnings for Diagnosis (Interrupt)
          1. 7.3.5.1.1 Output Current Limit
          2. 7.3.5.1.2 Thermal Warning
        2. 7.3.5.2 Protection (Regulator Disable)
          1. 7.3.5.2.1 Short-Circuit and Overload Protection
          2. 7.3.5.2.2 Thermal Shutdown
        3. 7.3.5.3 Fault (Power Down)
          1. 7.3.5.3.1 Undervoltage Lockout
      6. 7.3.6 Digital Signal Filtering
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
    5. 7.5 Programming
      1. 7.5.1 I2C-Compatible Interface
        1. 7.5.1.1 Data Validity
        2. 7.5.1.2 Start and Stop Conditions
        3. 7.5.1.3 Transferring Data
        4. 7.5.1.4 I2C-Compatible Chip Address
        5. 7.5.1.5 Auto Increment Feature
    6. 7.6 Register Maps
      1. 7.6.1 Register Descriptions
        1. 7.6.1.1  OTP_REV
        2. 7.6.1.2  BUCK0_CTRL1
        3. 7.6.1.3  BUCK0_CTRL2
        4. 7.6.1.4  BUCK1_CTRL1
        5. 7.6.1.5  BUCK1_CTRL2
        6. 7.6.1.6  BUCK2_CTRL1
        7. 7.6.1.7  BUCK2_CTRL2
        8. 7.6.1.8  BUCK3_CTRL1
        9. 7.6.1.9  BUCK3_CTRL2
        10. 7.6.1.10 BUCK0_VOUT
        11. 7.6.1.11 BUCK0_FLOOR_VOUT
        12. 7.6.1.12 BUCK1_VOUT
        13. 7.6.1.13 BUCK1_FLOOR_VOUT
        14. 7.6.1.14 BUCK2_VOUT
        15. 7.6.1.15 BUCK2_FLOOR_VOUT
        16. 7.6.1.16 BUCK3_VOUT
        17. 7.6.1.17 BUCK3_FLOOR_VOUT
        18. 7.6.1.18 BUCK0_DELAY
        19. 7.6.1.19 BUCK1_DELAY
        20. 7.6.1.20 BUCK2_DELAY
        21. 7.6.1.21 BUCK3_DELAY
        22. 7.6.1.22 RESET
        23. 7.6.1.23 CONFIG
        24. 7.6.1.24 INT_TOP
        25. 7.6.1.25 INT_BUCK_0_1
        26. 7.6.1.26 INT_BUCK_2_3
        27. 7.6.1.27 TOP_STAT
        28. 7.6.1.28 BUCK_0_1_STAT
        29. 7.6.1.29 BUCK_2_3_STAT
        30. 7.6.1.30 TOP_MASK
        31. 7.6.1.31 BUCK_0_1_MASK
        32. 7.6.1.32 BUCK_2_3_MASK
        33. 7.6.1.33 SEL_I_LOAD
        34. 7.6.1.34 I_LOAD_2
        35. 7.6.1.35 I_LOAD_1
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Application Components
          1. 8.2.2.1.1 Inductor Selection
          2. 8.2.2.1.2 Input Capacitor Selection
          3. 8.2.2.1.3 Output Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6.5 Electrical Characteristics

Limits apply over the junction temperature range –40°C ≤ TJ ≤ +125°C, specified V(VANA), VIN , V(NRST), VOUT and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, ƒSW = 3 MHz, V(VANA) = VIN = 3.7 V and VOUT = 1 V, unless otherwise noted.(1)(2)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
EXTERNAL COMPONENTS
CINInput filtering capacitanceConnected from VIN_Bx to PGND_Bx1.910µF
COUTOutput filtering capacitance, localCapacitance per output voltage rail1022µF
COUT-TOTALOutput capacitance, total (local and remote)Total output capacitance50µF
ESRCInput and output capacitor ESR[1-10] MHz210mΩ
LInductorInductance of the inductor0.47µH
–30%30%
DCRLInductor DCRTDK, VLS252010HBX-R47M29mΩ
BUCK REGULATORS
VINInput voltage rangeVoltage between VIN_Bx and ground terminals. VANA must be connected to the same supply as VIN_Bx.2.53.75.5V
VOUTOutput voltageProgrammable voltage range0.513.36V
Step size, 0.5 V ≤ VOUT < 0.73 V10mV
Step size, 0.73 V ≤ VOUT < 1.4 V5
Step size, 1.4 V ≤ VOUT ≤ 3.36 V20
IOUTOutput currentOutput current, VIN ≤ 3 V
ILIM FWD programmed to 5 A per phase.		3(3)A
Output current, VIN > 3 V, VOUT ≤ 2 V
ILIM FWD programmed to 5 A per phase.		4(3)
Output current, VIN > 3 V, VOUT > 2 V
ILIM FWD programmed to 5 A per phase.		3.5(3)
Dropout voltageVIN – VOUT0.7V
DC output voltage accuracy, includes voltage reference, DC load and line regulations, process and temperatureForce PWM modemin (–2%,
–20 mV)		max (2%, 20 mV)
PFM mode, the average output voltage level is increased by a maximum of 20 mV.min (–2%,
–20 mV)		max ( 2%, 20 mV) + 20 mV
RipplePWM mode, L = 0.47 µH10mVp-p
PFM mode, L = 0.47 µH20
DCLNRDC line regulationIOUT = 1 A±0.05%/V
DCLDRDC load regulation in PWM modeIOUT from 0 to IOUT(max)0.3%
TLDSRTransient load step responseIOUT = 0 A to 2 A, TR = TF = 400 ns, PWM mode, COUT = 44 µF, L = 0.47 µH±55mV
TLNSRTransient line responseVIN stepping 3.3 V ↔ 3.8 V, TR = TF = 10 µs, IOUT = IOUT(max)±15mV
ILIM FWDForward current limit (peak for every switching cycle), per phaseProgrammable range2.55A
Step size0.5
Accuracy, 3 V ≤ VIN ≤ 5.5 V, ILIM FWD = 5 A-5%7.5%20%
Accuracy, 2.5 V ≤ VIN ≤ 3 V, ILIM FWD = 5 A-20%7.5%20%
ILIM NEGNegative current limit1.622.4A
RDS(ON) HS FETOn-resistance, high-side FETBetween VIN_Bx and SW_Bx pins (I = 1 A)4090mΩ
RDS(ON) LS FETOn-resistance, low-side FETBetween SW_Bx and PGND_Bx pins
(I = 1 A)		3350mΩ
Overshoot during start-upSlew-rate = 10 mV/µs< 50mV
IPFM-PWMPFM-to-PWM switch - current threshold(4)600mA
IPWM-PFMPWM-to-PFM switch - current threshold(4)240mA
Output pulldown resistanceRegulator disabled150250350Ω
Powergood threshold for interrupt BUCKx_INT(BUCKx_SC_INT), difference from final voltageRising ramp voltage, enable or voltage change–23–17–10mV
Falling ramp, voltage change101723
Powergood threshold for status signal BUCKx_STAT(BUCKx_PG_STAT)During operation, status signal is forced to 0 during voltage change.–23–17–10mV
PROTECTION FEATURES
Thermal warningTemperature rising, CONFIG(TDIE_WARN_LEVEL) = 0125°C
Temperature rising, CONFIG(TDIE_WARN_LEVEL) = 1105
Hysteresis15
Thermal shutdownTemperature rising150°C
Hysteresis15
VANAUVLOVANA undervoltage lockoutVoltage falling2.32.42.5V
Hysteresis50mV
LOAD CURRENT MEASUREMENT
Current measurement rangeMaximum code20.46A
ResolutionLSB20mA
Measurement accuracyIOUT ≥ 1 A< 10%
CURRENT CONSUMPTION
Shutdown current consumptionV(NRST) = 0 V1µA
Standby current consumption, converter cores disabledV(NRST) = 1.8 V6µA
Active current consumption during PFM operation, one converter core enabledV(NRST) = 1.8 V, IOUT = 0 mA, not switching55µA
Active current consumption during PWM operation, per converter coreV(NRST) = 1.8 V, IOUT = 0 mA, L = 0.47 µH14.5mA
DIGITAL INPUT SIGNALS NRST, ENx, SCL, SDA
VILInput low level0.4V
VIHInput high level1.2V
VHYSHysteresis of Schmitt trigger inputs (SCL, SDA)1080160mV
ENx pulldown resistanceENx_PD = 1350500720kΩ
NRST pulldown resistanceAlways present80012001700kΩ
DIGITAL OUTPUT SIGNALS nINT, SDA
VOLOutput low levelISOURCE = 2 mA,0.4V
RPExternal pullup resistor for nINTTo VIO supply10kΩ
ALL DIGITAL INPUTS
ILEAKInput currentAll logic inputs over pin voltage range−11µA
(1) All voltage values are with respect to network ground.
(2) Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers are not verified, but do represent the most likely norm.
(3) The maximum output current can be limited by the forward current limit, ILIM FWD. The maximum output current is available with 5-A forward current limit setting.
(4) The final PFM-to-PWM and PWM-to-PFM switchover current varies slightly and is dependant on the output voltage, input voltage and the magnitude of inductor's ripple current.