The SPMI controller block in the primary PMIC executes the SPMI-BIST periodically while device is operating. The time-period after the SPMI-BIST is repeated according factory-configured settings during the device boot time, and after the device reaches mission states. The factory-configured settings of this SPMI-BIST time period must be the same for all PMICs on the same SPMI network. The SPMI target devices on the SPMI bus expect a request for sending its TID from the SPMI controller device within 1.5x the factory-configured period . This factor 1.5x provides enough margin for clock uncertainty between the SPMI controller device and the SPMI target device.

During mission state operation, the SPMI controller device expects the SPMI target devices to respond to the TID request within the factory-configured polling time-out period . In other words, from the polling start command each SPMI target device must respond within this factory-configured time interval.

During boot time or when the device enters Safe Recovery state, to prevent the SPMI controller device from polling the SPMI target devices too often while one or more of these recovering from a system error such as a thermal shutdown event, the device sets a longer timeout period that allows the SPMI target devices to respond to the SPMI controller device before he SPMI controller device reports an error.

If one or more devices on the SPMI bus cause a violating of the polling time-out period either during start-up or during normal operation, the SPMI controller block in the affected PMIC(s) sets a SPMI error trigger signal to the PFSM of the affected PMIC(s), causing a complete shutdown of the affected PMIC(s). As a result, the affected PMIC(s) no longer respond on the SPMI bus, which in turn is detected by the SPMI controller block off the non-affected PMICs on the SPMI bus. The SPMI controller block in these PMICs sets an SPMI error to the PFSM in these PMICs, causing a complete shutdown of these PMICs. Therefore, all PMICs are finally shutdown if one or more devices on the SPMI bus cause a violating of the polling time-out period .