JAJSCD8C August   2015  – May 2017 LP8861-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
    1.     システム効率
  3. 概要
    1.     概略回路図
  4. 改訂履歴
  5. デバイス比較表
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Internal LDO Electrical Characteristics
    7. 7.7  Protection Electrical Characteristics
    8. 7.8  Power Line FET Control Electrical Characteristics
    9. 7.9  Current Sinks Electrical Characteristics
    10. 7.10 PWM Brightness Control Electrical Characteristics
    11. 7.11 Boost/SEPIC Converter Characteristics
    12. 7.12 Logic Interface Characteristics
    13. 7.13 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Integrated Boost/SEPIC Converter
      2. 8.3.2 Internal LDO
      3. 8.3.3 LED Current Sinks
        1. 8.3.3.1 Current Sink Configuration
        2. 8.3.3.2 Current Setting
        3. 8.3.3.3 Brightness Control
      4. 8.3.4 Power-Line FET Control
      5. 8.3.5 LED Current Dimming With External Temperature Sensor
      6. 8.3.6 Protection and Fault Detection
        1. 8.3.6.1 Adaptive Boost Control and Functionality of LED Fault Comparators
        2. 8.3.6.2 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device States
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application for 4 LED Strings
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 LDO Output Capacitor
          5. 9.2.1.2.5 Diode
          6. 9.2.1.2.6 Power Line Transistor
          7. 9.2.1.2.7 Input Current Sense Resistor
        3. 9.2.1.3 Application Curves
      2. 9.2.2 High Output Current Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SEPIC Mode Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 Diode
          2. 9.2.3.2.2 Inductor
        3. 9.2.3.3 Application Curves
      4. 9.2.4 Application with Temperature Based LED Current De-rating
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Integrated Boost/SEPIC Converter

The LP8861-Q1 boost/SEPIC DC-DC converter generates supply voltage for the LEDs. The maximum output voltage VMAX BOOST is defined by an external resistive divider (R1, R2).

Maximum voltage must be chosen based on the maximum voltage required for LED strings. Recommended VMAX BOOST is about 30% higher than maximum LED string voltage. DC-DC output voltage is adjusted automatically based on LED current sink headroom voltage. Maximum, minimum, and initial boost voltages can be calculated with Equation 1:

Equation 1. LP8861-Q1 formula_boost_max_volt_SNVSA50.gif

where

  • VBG = 1.2 V
  • R2 recommended value is 130 kΩ
  • Resistor values are in kΩ
  • K = 1 for maximum adaptive boost voltage (typical)
  • K = 0 for minimum adaptive boost voltage (typical)
  • K = 0.88 for initial boost voltage (typical)
LP8861-Q1 C008_SNVSA50.pngFigure 9. Maximum Converter Output Voltage vs R1 Resistance

Alternatively, a T-divider can be used if resistance less than 100 kΩ is required for the external resistive divider. Refer to LP8861-Q1EVM Evaluation Module for details.

The converter is a current mode DC-DC converter, where the inductor current is measured and controlled with the feedback. Switching frequency is adjustable between 300 kHz and 2.2 MHz with RFSET resistor as shown in Equation 2:

Equation 2. ƒSW = 67600/ (RFSET + 6.4)

where

  • ƒSW is switching frequency, kHz
  • RFSET is frequency setting resistor, kΩ

In most cases lower frequency has higher system efficiency. Boost parameters are chosen automatically during start-up according to the selected switching frequency (see Table 2). In boost mode a 15-pF capacitor CFB must be placed across resistor R1 when operating in 300 kHz ... 500 kHz range (see Figure 24). When operating in the 1.8-MHz...2.2-MHz range, CFB = 4.7 pF (see Figure 29).

LP8861-Q1 boost_diagr_SNVSA50.gifFigure 10. Boost Block Diagram

Boost clock can be driven by an external SYNC signal between 300 kHz…2.2 MHz. If the external synchronization input disappears, boost continues operation at the frequency defined by RFSET resistor. When external frequency disappears and SYNC pin level is low, boost continues operation without spread spectrum immediately. If SYNC remains high, boost continues switching with spread spectrum enabled after 256 µs.

External SYNC frequency must be 1.2…1.5 times higher than the frequency defined by the RFSET resistor. Minimum frequency setting with RFSET is 250 kHz to support minimum switching frequency with external clock frequency 300 kHz.

The optional spread-spectrum feature (±3% from central frequency, 1-kHz modulation frequency) reduces EMI noise spikes at the switching frequency and its harmonic frequencies. When external synchronization is used, spread spectrum is not available.

Table 1. Boost Synchronization Mode

SYNC PIN STATUS MODE
Low Spread spectrum disabled
High Spread spectrum enabled
300...2200 kHz frequency Spread spectrum disabled, external synchronization mode

Table 2. Boost Parameters(1)

RANGE FREQUENCY (kHz) TYPICAL
INDUCTANCE (µH)
TYPICAL BOOST INPUT
AND OUTPUT CAPACITORS (µF)
MIN SWITCH
OFF TIME (ns)(2)
BLANK
TIME (ns)
CURRENT
RAMP (A/s)
CURRENT RAMP
DELAY (ns)
1 300...480 33 2 × 10 (cer.) + 33 (electr.) 150 95 24 550
2 480...1150 15 10 (cer.) +33 (electr.) 60 95 43 300
3 1150...1650 10 3 × 10 (cer.) 40 95 79 0
4 1650...2200 4.7 3 × 10 (cer.) 40 70 145 0
Parameters are for reference only.
Due to current sensing comparator delay the actual minimum off time is 6 ns (typical) longer than in the table.

Boost SW pin DC current is limited to 2 A (typical). To support warm start transient condition the current limit is automatically increased to 2.5 A for a short period of 1.5 seconds when a 2-A limit is reached.

NOTE

Application condition where the 2-A limit is exceeded continuously is not allowed. In this case the current limit would be 2 A for 1.5 seconds followed by 2.5-A limit for 1.5 seconds, and this 3-second period repeats.

To keep switching voltage within safe levels there is a 48-V limit comparator in the event that FB loop is broken.