JAJSFL7B June   2018  – April 2021 LSF0204-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: AC Performance (Translating Down, 3.3 V to 1.8 V)
    7. 6.7  Switching Characteristics: AC Performance (Translating Down, 3.3 V to 1.2 V)
    8. 6.8  Switching Characteristics: AC Performance (Translating Up, 1.8 V to 3.3 V)
    9. 6.9  Switching Characteristics: AC Performance (Translating Up, 1.2 V to 1.8 V)
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto-Bidirectional Voltage Translation Without DIR Pin Terminal
      2. 7.3.2 Support Multiple High Speed Translation Interfaces
      3. 7.3.3 5-V Tolerance on IO Port and 125°C Support
      4. 7.3.4 Channel Specific Translation
      5. 7.3.5 Ioff, Partial Power Down Mode
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 I2C, PMBus, SMBus, GPIO Application
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
            1. 8.2.1.2.1.1 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 MDIO Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Multiple Voltage Translation in Single Device, Application
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
VIKInput clamp voltageII = -18 mA, VEN = 0–1.2V
IIHI/O input high leakageVI = 5 V, VEN = 05.0µA
ICCBALeakage from Vref_B to Vref_AVref_B = 3.3 V, Vref_A = 1.8 V, VEN = Vref_A IO = 0, VI = 3.3 V or GND3.5µA
ICCA + ICCB(3)Total Current through GNDVref_B = 3.3 V, Vref_A = 1.8 V, VEN = Vref_A IO = 0, VI = 3.3 V or GND0.2µA
IINControl pin currentVref_B = 5.5 V, Vref_A = 4.5 V, VEN = 0 to Vref_A IO = 0±1µA
IoffPower Off Leakage CurrentVref_B = Vref_A = 0 V, VEN = GND IO = 0, VI = 5 V or GND±1µA
CI(ref_A/B/EN)Input capacitanceVI = 3 V or 07pF
Cio(off)I/O pin off-state capacitanceVO = 3 V or 0, VEN = 05.06.0pF
Cio(on)I/O pin on-state capacitanceVO = 3 V or 0, VEN = Vref_A10.513pF
VIH (EN pin)High-level input voltageVref_A = 1.5 V to 4.5 V0.7×Vref_AV
VIL (EN pin)Low-level input voltageVref_A = 1.5 V to 4.5 V0.3×Vref_AV
VIH (EN pin)High-level input voltageVref_A= 1.0 V to 1.5 V0.8×Vref_AV
VIL (EN pin)Low-level input voltageVref_A = 1.0 V to 1.5 V0.3×Vref_AV
∆t/∆v (EN pin)Input transition rise or fall rate for EN pin10ns/V
ron (2)On-state resistanceVI = 0, IO = 64 mAVref_A = VEN = 3.3 V; Vref_B = 5 V3Ω
Vref_A = VEN = 1.8 V; Vref_B = 5 V4
VI = 0, IO = 32 mAVref_A = VEN = 1.0 V; Vref_B = 5 V9Ω
Vref_A = VEN = 1.8 V; Vref_B = 5 V4
VI = 0, IO = 32 mA , Vref_A = VEN = 2.5 V; Vref_B = 5 V10Ω
VI = 1.8 V, IO = 15 mA, Vref_A = VEN = 3.3 V; Vref_B = 5 V5Ω
VI = 1.0 V, IO = 10 mA, Vref_A = VEN = 1.8 V; Vref_B = 3.3 V8Ω
VI = 0 V, IO = 10 mA, Vref_A = VEN = 1.0 V; Vref_B = 3.3 V6Ω
VI = 0 V, IO = 10 mA, Vref_A = VEN = 1.0 V; Vref_B = 1.8 V6Ω
(1) All typical values are at TA = 25°C.
(2) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
(3) The actual supply current for LSF0204 is ICCA + ICCB; the leakage from Vref_B to Vref_A can be measured on Vref_A and Vref_B pin