JAJSQL6B July   2014  – September 2023 LV284

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Bootstrap Voltage (CB)
      3. 7.3.3 Setting the Ouput Voltage
      4. 7.3.4 Enable (SHDN) and VIN Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
      2. 7.4.2 Eco-mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 5 V Output Application
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Design Guide – Step By Step Design Procedure
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Output Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Schottky Diode Selection
          4. 8.2.1.2.4 Input Capacitor Selection
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The LV284 device is a 40 V, 1 A step-down (buck) regulator. The buck regulator has a very low quiescent current during the light load to prolong the battery life.

The LV284 improves performance during line and load transients by implementing a constant frequency, current mode control which reduces output capacitance and simplifies frequency compensation design. The LV284 reduces the external component count by integrating the boot recharge diode. The bias voltage for the integrated high side MOSFET is supplied by a capacitor on the CB to SW pin. The boot capacitor voltage is monitored by an UVLO circuit and will turn the high side MOSFET off when the boot voltage falls below a preset threshold. The LV284 can operate at high duty cycles because of the boot UVLO and small refresh FET. The output voltage can be stepped down to as low as the 0.765 V reference. Internal soft start is featured to minimize inrush currents.