JAJSQD9B january 2015 – june 2023 LV2862
PRODUCTION DATA
The LV2862 SHDN pin is a high-voltage tolerant input with an internal pullup circuit. The device can be enabled even if the SHDN pin is floating. The regulator can also be turned on using 1.25 V or higher logic signals. It can be used if the use of a higher voltage is desired due to system or other constraints. A 100-kΩ or larger resistor is recommended between the applied voltage and the SHDN pin to protect the device. When SHDN is pulled down to 0 V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode, the supply current is decreased to approximately 1 µA. If the shutdown function is not to be used, the SHDN pin can be tied to VIN through a 100-kΩ resistor. The maximum voltage to the SHDN pin must not exceed 60 V. The LV2862 has an internal UVLO circuit to shut down the output if the input voltage falls below an internally fixed UVLO threshold level. This ensures that the regulator is not latched into an unknown state during low input voltage conditions. The regulator powers up when the input voltage exceeds the voltage level. If there is a requirement for a higher UVLO voltage, the SHDN pin can be used to adjust the input voltage UVLO by using external resistors.