JAJSST7A January   2024  – May 2024 MCF8315C-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Output Stage
      2. 6.3.2  Device Interface
        1. 6.3.2.1 Interface - Control and Monitoring
        2. 6.3.2.2 I2C Interface
      3. 6.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 6.3.3.1 Buck in Inductor Mode
        2. 6.3.3.2 Buck in Resistor mode
        3. 6.3.3.3 Buck Regulator with External LDO
        4. 6.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 6.3.3.5 Mixed Mode Buck Operation and Control
        6. 6.3.3.6 Buck Under Voltage Protection
        7. 6.3.3.7 Buck Over Current Protection
      4. 6.3.4  AVDD Linear Voltage Regulator
      5. 6.3.5  Charge Pump
      6. 6.3.6  Slew Rate Control
      7. 6.3.7  Cross Conduction (Dead Time)
      8. 6.3.8  Motor Control Input Sources
        1. 6.3.8.1 Analog Mode Motor Control
        2. 6.3.8.2 PWM Mode Motor Control
        3. 6.3.8.3 I2C based Motor Control
        4. 6.3.8.4 Frequency Mode Motor Control
        5. 6.3.8.5 Speed Profiles
          1. 6.3.8.5.1 Linear Reference Profiles
          2. 6.3.8.5.2 Staircase Reference Profiles
          3. 6.3.8.5.3 Forward-Reverse Reference Profiles
      9. 6.3.9  Starting the Motor Under Different Initial Conditions
        1. 6.3.9.1 Case 1 – Motor is Stationary
        2. 6.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 6.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 6.3.10 Motor Start Sequence (MSS)
        1. 6.3.10.1 Initial Speed Detect (ISD)
        2. 6.3.10.2 Motor Resynchronization
        3. 6.3.10.3 Reverse Drive
          1. 6.3.10.3.1 Reverse Drive Tuning
      11. 6.3.11 Motor Start-up
        1. 6.3.11.1 Align
        2. 6.3.11.2 Double Align
        3. 6.3.11.3 Initial Position Detection (IPD)
          1. 6.3.11.3.1 IPD Operation
          2. 6.3.11.3.2 IPD Release Mode
          3. 6.3.11.3.3 IPD Advance Angle
        4. 6.3.11.4 Slow First Cycle Start-up
        5. 6.3.11.5 Open loop
        6. 6.3.11.6 Transition from Open to Closed Loop
      12. 6.3.12 Closed Loop Operation
        1. 6.3.12.1 Closed Loop Acceleration/Deceleration Slew Rate
        2. 6.3.12.2 Speed PI Control
        3. 6.3.12.3 Current PI Control
        4. 6.3.12.4 Torque Mode
        5. 6.3.12.5 Overmodulation
      13. 6.3.13 Motor Parameters
        1. 6.3.13.1 Motor Resistance
        2. 6.3.13.2 Motor Inductance
        3. 6.3.13.3 Motor Back-EMF constant
      14. 6.3.14 Motor Parameter Extraction Tool (MPET)
      15. 6.3.15 Anti-Voltage Surge (AVS)
      16. 6.3.16 Active Braking
      17. 6.3.17 Output PWM Switching Frequency
      18. 6.3.18 PWM Modulation Schemes
      19. 6.3.19 Dead Time Compensation
      20. 6.3.20 Motor Stop Options
        1. 6.3.20.1 Coast (Hi-Z) Mode
        2. 6.3.20.2 Low-Side Braking
        3. 6.3.20.3 Active Spin-Down
      21. 6.3.21 FG Configuration
        1. 6.3.21.1 FG Output Frequency
        2. 6.3.21.2 FG during open loop
        3. 6.3.21.3 FG during idle and fault
      22. 6.3.22 DC Bus Current Limit
      23. 6.3.23 Protections
        1. 6.3.23.1  VM Supply Undervoltage Lockout
        2. 6.3.23.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 6.3.23.3  BUCK Under Voltage Lockout (BUCK_UV)
        4. 6.3.23.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 6.3.23.5  Overvoltage Protection (OVP)
        6. 6.3.23.6  Overcurrent Protection (OCP)
          1. 6.3.23.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 6.3.23.6.2 OCP Automatic Retry (OCP_MODE = 01b)
        7. 6.3.23.7  Buck Overcurrent Protection
        8. 6.3.23.8  Hardware Lock Detection Current Limit (HW_LOCK_ILIMIT)
          1. 6.3.23.8.1 HW_LOCK_ILIMIT Latched Shutdown (HW_LOCK_ILIMIT_MODE = 00xxb)
          2. 6.3.23.8.2 HW_LOCK_ILIMIT Automatic recovery (HW_LOCK_ILIMIT_MODE = 01xxb)
          3. 6.3.23.8.3 HW_LOCK_ILIMIT Report Only (HW_LOCK_ILIMIT_MODE = 1000b)
          4. 6.3.23.8.4 HW_LOCK_ILIMIT Disabled (HW_LOCK_ILIMIT_MODE= 1xx1b)
        9. 6.3.23.9  Motor Lock (MTR_LCK)
          1. 6.3.23.9.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 6.3.23.9.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 6.3.23.9.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 6.3.23.9.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        10. 6.3.23.10 Motor Lock Detection
          1. 6.3.23.10.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 6.3.23.10.2 Lock 2: Abnormal BEMF (ABN_BEMF)
          3. 6.3.23.10.3 Lock3: No-Motor Fault (NO_MTR)
        11. 6.3.23.11 Minimum VM (undervoltage) Protection
        12. 6.3.23.12 Maximum VM (overvoltage) Protection
        13. 6.3.23.13 MPET Faults
        14. 6.3.23.14 IPD Faults
        15. 6.3.23.15 Thermal Warning (OTW)
        16. 6.3.23.16 Thermal Shutdown (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Functional Modes
        1. 6.4.1.1 Sleep Mode
        2. 6.4.1.2 Standby Mode
        3. 6.4.1.3 Fault Reset (CLR_FLT)
    5. 6.5 External Interface
      1. 6.5.1 DRVOFF Functionality
      2. 6.5.2 DAC output(s)
      3. 6.5.3 Current Sense Output
      4. 6.5.4 Oscillator Source
        1. 6.5.4.1 External Clock Source
      5. 6.5.5 External Watchdog
    6. 6.6 EEPROM access and I2C interface
      1. 6.6.1 EEPROM Access
        1. 6.6.1.1 EEPROM Write
        2. 6.6.1.2 EEPROM Read
      2. 6.6.2 I2C Serial Interface
        1. 6.6.2.1 I2C Data Word
        2. 6.6.2.2 I2C Write Transaction
        3. 6.6.2.3 I2C Read Transaction
        4. 6.6.2.4 I2C Communication Protocol Packet Examples
        5. 6.6.2.5 I2C Clock Stretching
        6. 6.6.2.6 CRC Byte Calculation
  8. EEPROM (Non-Volatile) Register Map
    1. 7.1 Algorithm_Configuration Registers
    2. 7.2 Fault_Configuration Registers
    3. 7.3 Hardware_Configuration Registers
    4. 7.4 Internal_Algorithm_Configuration Registers
  9. RAM (Volatile) Register Map
    1. 8.1 Fault_Status Registers
    2. 8.2 System_Status Registers
    3. 8.3 Device_Control Registers
    4. 8.4 Algorithm_Control Registers
    5. 8.5 Algorithm_Variables Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Curves
        1. 9.2.1.1 Motor startup
        2. 9.2.1.2 MPET
        3. 9.2.1.3 Dead time compensation
        4. 9.2.1.4 Auto handoff
        5. 9.2.1.5 Anti voltage surge (AVS)
        6. 9.2.1.6 Real time variable tracking using DACOUT
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Bulk Capacitance
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Thermal Considerations
        1. 9.4.2.1 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 サポート・リソース
    2. 10.2 Trademarks
    3. 10.3 静電気放電に関する注意事項
    4. 10.4 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Active Braking

Decelerating the motor quickly requires the motor mechanical energy to be extracted from the rotor in a fast and controlled manner. However, the supply voltage (VM) increases if the motor mechanical energy is returned to the power supply during the deceleration process. MCF8315C-Q1 is capable of decelerating the motor quickly without pumping energy back into the supply voltage by using a novel technique called active braking. ACTIVE_BRAKE_EN should be set to 1b to enable active braking and prevent DC bus voltage (VM) spike during fast motor deceleration. Active braking can also be used during reverse drive (see Section 6.3.10.3) or motor stop (see Section 6.3.20.3) to reduce the motor speed quickly without DC bus voltage (VM) spike.

The maximum limit on the current sourced from the DC bus (idc_ref) during active braking can be configured using ACTIVE_BRAKE_CURRENT_LIMIT. The D-axis current reference (id_ref) is generated from the error between DC bus current limit (idc_ref) and the estimated DC bus current (idc) using a PI controller as shown in Figure 6-43. The gain constants of PI controller can be configured using ACTIVE_BRAKE_KP and ACTIVE_BRAKE_KI. During active braking, the DC bus current limit (idc_ref) starts from zero and linearly increases to ACTIVE_BRAKE_CURRENT_LIMIT with current slew rate as defined by ACTIVE_BRAKE_BUS_CURRENT_SLEW_RATE.

MCF8315C-Q1 Active Braking Current Control
                    Loop for id_ref Figure 6-43 Active Braking Current Control Loop for id_ref

ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY sets the minimum difference between the initial and target speed above which active braking will be entered. For example, consider ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY is set to 10%; if the initial speed is 100% and target speed is set to 95%, MCF8315C-Q1 uses AVS instead of active braking to reach 95% speed since the difference in commanded speed change (5%) is less than ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY (10%).

ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT sets the difference between the current and target speed below which active braking will be exited. For example, consider ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT is set to 5%; if the initial motor speed is 100% and target speed is set to 10%, MCF8315C-Q1 uses active braking to reduce the motor speed to 15%; upon reaching 15% speed, MCF8315C-Q1 exits active braking and uses AVS to decelerate the motor speed to 10%.

ACTIVE_BRAKE_MOD_INDEX_LIMIT sets the modulation index below which active braking will be used. For example, consider ACTIVE_BRAKE_MOD_INDEX_LIMIT is set to 50%, ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY is set to 5%, ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT is set to 2.5%. If the initial motor speed is at 70% (corresponding modulation index is 90%) and target speed is 40% (corresponding modulation index is 60%), MCF8315C-Q1 uses AVS to decelerate the motor till target speed of 40% since the modulation index (60%) corresponding to final speed is higher than ACTIVE_BRAKE_MOD_INDEX_LIMIT of 50%. In the same case, if final speed command is 10% (corresponding modulation index is 30%), MCF8315C-Q1 uses AVS till 30% speed (corresponding modulation index is 50%), switches to active braking from 30% to 15% speed (final speed of 10% + ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT of 5%) and uses AVS again from 15% to 10% speed to complete the active braking. TI recommends starting active braking tuning with ACTIVE_BRAKE_MOD_INDEX_LIMIT set to 100%; if there is a DC bus voltage (VM) spike observed during active braking, reduce ACTIVE_BRAKE_MOD_INDEX_LIMIT in steps so as to eliminate this voltage spike. If ACTIVE_BRAKE_MOD_INDEX_LIMIT is set to 0%, MCF8315C-Q1 decelerates in AVS (even when ACTIVE_BRAKE_EN is set to 1b) in the forward direction; in reverse direction (during direction change), ACTIVE_BRAKE_MOD_INDEX_LIMIT is not applicable and therefore MCF8315C-Q1 decelerates in active braking.

Note:
  1. ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY, ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT and ACTIVE_BRAKE_MOD_INDEX_LIMIT are applicable only during deceleration in forward direction and not used during direction change.
  2. ACTIVE_BRAKE_SPEED_DELTA_LIMIT_ENTRY should be set higher than ACTIVE_BRAKE_SPEED_DELTA_LIMIT_EXIT for active braking operation.
  3. During active (or closed loop) braking, Iq_ref is clamped to -ILIMIT. This (Iq_ref being clamped to -ILIMIT) may result in the speed PI loop getting saturated and SPEED_LOOP_SATURATION bit getting set to 1b during deceleration. This bit is automatically set to 0b once the deceleration is completed and the speed PI loop is out of saturation. Hence, speed loop saturation fault should be ignored during deceleration.
  4. Active braking is not available in torque mode.