JAJSG80 データシート

JAJSG80B May 2015 – September 2020 MSP430FG6425 , MSP430FG6426 , MSP430FG6625 , MSP430FG6626

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

PZ|100
- MTQF013A

サーマルパッド・メカニカル・データ

PZ|100
- QFND428

発注情報

8.8.3.2 Crystal Oscillator, XT2

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)⁽¹⁾ ⁽²⁾

PARAMETER		TEST CONDITIONS	V_CC	MIN	TYP	MAX	UNIT
I_DVCC,XT2	XT2 oscillator crystal current consumption	f_OSC = 4 MHz, XT2OFF = 0, T_A = 25°C, XT2BYPASS = 0, XT2DRIVEx = 0	3 V		200		µA
		f_OSC = 12 MHz, XT2OFF = 0, T_A = 25°C, XT2BYPASS = 0, XT2DRIVEx = 1			260
		f_OSC = 20 MHz, XT2OFF = 0, T_A = 25°C, XT2BYPASS = 0, XT2DRIVEx = 2			325
		f_OSC = 32 MHz, XT2OFF = 0, T_A = 25°C, XT2BYPASS = 0, XT2DRIVEx = 3			450
f_XT2,HF0	XT2 oscillator crystal frequency, mode 0	XT2DRIVEx = 0, XT2BYPASS = 0⁽³⁾		4		8	MHz
f_XT2,HF1	XT2 oscillator crystal frequency, mode 1	XT2DRIVEx = 1, XT2BYPASS = 0⁽³⁾		8		16	MHz
f_XT2,HF2	XT2 oscillator crystal frequency, mode 2	XT2DRIVEx = 2, XT2BYPASS = 0⁽³⁾		16		24	MHz
f_XT2,HF3	XT2 oscillator crystal frequency, mode 3	XT2DRIVEx = 3, XT2BYPASS = 0⁽³⁾		24		32	MHz
f_XT2,HF,SW	XT2 oscillator logic-level square-wave input frequency	XT2BYPASS = 1⁽³⁾⁽⁴⁾		0.7		32	MHz
OA_HF	Oscillation allowance for HF crystals⁽⁵⁾	XT2DRIVEx = 0, XT2BYPASS = 0, f_XT2,HF0 = 6 MHz, C_L,eff = 15 pF			450		Ω
		XT2DRIVEx = 1, XT2BYPASS = 0, f_XT2,HF1 = 12 MHz, C_L,eff = 15 pF			320
		XT2DRIVEx = 2, XT2BYPASS = 0, f_XT2,HF2 = 20 MHz, C_L,eff = 15 pF			200
		XT2DRIVEx = 3, XT2BYPASS = 0, f_XT2,HF3 = 32 MHz, C_L,eff = 15 pF			200
t_START,HF	Start-up time	f_OSC = 6 MHz, XT2BYPASS = 0, XT2DRIVEx = 0, T_A = 25°C, C_L,eff = 15 pF	3 V		0.5		ms
t_START,HF	Start-up time	f_OSC = 20 MHz, XT2BYPASS = 0, XT2DRIVEx = 3, T_A = 25°C, C_L,eff = 15 pF	3 V		0.3		ms
C_L,eff	Integrated effective load capacitance, HF mode⁽⁶⁾ ⁽¹⁾				1		pF
	Duty cycle	Measured at ACLK, f_XT2,HF2 = 20 MHz		40%	50%	60%
f_Fault,HF	Oscillator fault frequency⁽⁷⁾	XT2BYPASS = 1⁽⁸⁾		30		300	kHz

(1) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.

(2) To improve EMI on the XT2 oscillator, observe the following guidelines.

Keep the traces between the device and the crystal as short as possible.
Design a good ground plane around the oscillator pins.
Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.
Use assembly materials and processes that avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.
If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.

(3) Maximum frequency of operation of the entire device cannot be exceeded.

(4) When XT2BYPASS is set, the XT2 circuit is automatically powered down.

(5) Oscillation allowance is based on a safety factor of 5 for recommended crystals.

(6) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Because the PCB adds additional capacitance, verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should always match the specification of the used crystal.

(7) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag. Frequencies between the MIN and MAX specifications might set the flag.

(8) Measured with logic-level input frequency but also applies to operation with crystals.

Section 8.8.3.3 lists the characteristics of the VLO.