JAJSUK6A May 2024 – October 2024 MSPM0L1227 , MSPM0L1228 , MSPM0L2227 , MSPM0L2228
PRODUCTION DATA
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The mixed-signal IO pin slice diagram for a full featured IO pin is shown in Figure 8-3. Not all pins will have analog functions, wake-up logic, drive strength control, and pullup or pulldown resistors available. See the device-specific data sheet for detailed information on what features are supported for a specific pin.