JAJSCO7A November   2016  – November 2017 MUX506 , MUX507

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Dual Supply
    6. 6.6 Electrical Characteristics: Single Supply
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  Truth Tables
    2. 7.2  On-Resistance
    3. 7.3  Off Leakage
    4. 7.4  On-Leakage Current
    5. 7.5  Transition Time
    6. 7.6  Break-Before-Make Delay
    7. 7.7  Turn-On and Turn-Off Time
    8. 7.8  Charge Injection
    9. 7.9  Off Isolation
    10. 7.10 Channel-to-Channel Crosstalk
    11. 7.11 Bandwidth
    12. 7.12 THD + Noise
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Ultralow Leakage Current
      2. 8.3.2 Ultralow Charge Injection
      3. 8.3.3 Bidirectional Operation
      4. 8.3.4 Rail-to-Rail Operation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The MUX50x family offers outstanding input/output leakage currents and ultra-low charge injection. These devices operate up to 36 V, and offer true rail-to-rail input and output. The on-capacitance of the MUX50x is very low. These features makes the MUX50x a family of precision, robust, high-performance analog multiplexer for high-voltage, industrial applications.

9.2 Typical Application

Figure 42 shows a 16-bit, differential, 8-channel, multiplexed, data-acquisition system. This example is typical in industrial applications that require low distortion and a high-voltage differential input. The circuit uses the ADS8864, a 16-bit, 400-kSPS successive-approximation-resistor (SAR) analog-to-digital converter (ADC), along with a precision, high-voltage, signal-conditioning front end, and a 4-channel differential mux. This TI Precision Design details the process for optimizing the precision, high-voltage, front-end drive circuit using the MUX507, OPA192 and OPA140 to achieve excellent dynamic performance and linearity with the ADS8864.

MUX506 MUX507 Typical_app_BAS803.gif Figure 42. 16-Bit Precision Multiplexed Data-Acquisition System for High-Voltage Inputs With Lowest Distortion

9.2.1 Design Requirements

The primary objective is to design a ±20 V, differential, 8-channel, multiplexed, data-acquisition system with lowest distortion using the 16-bit ADS8864 at a throughput of 400 kSPS for a 10-kHz, full-scale, pure, sine-wave input. The design requirements for this block design are:

  • System supply voltage: ±15 V
  • ADC supply voltage: 3.3 V
  • ADC sampling rate: 400 kSPS
  • ADC reference voltage (REFP): 4.096 V
  • System input signal: A high-voltage differential input signal with a peak amplitude of 20 V and frequency (fIN) of 10 kHz are applied to each differential input of the mux.

9.2.2 Detailed Design Procedure

The purpose of this precision design is to design an optimal, high-voltage, multiplexed, data-acquisition system for highest system linearity and fast settling. The overall system block diagram is illustrated in Figure 42. The circuit is a multichannel, data-acquisition signal chain consisting of an input low-pass filter, mux, mux output buffer, attenuating SAR ADC driver, and the reference driver. The architecture allows fast sampling of multiple channels using a single ADC, providing a low-cost solution. This design systematically approaches each analog circuit block to achieve a 16-bit settling for a full-scale input stage voltage and linearity for a 10-kHz sinusoidal input signal at each input channel. Detailed design considerations and component selection procedure can be found in the TI Precision Design TIPD151, 16-Bit, 400-kSPS, 4-Channel Multiplexed Data-Acquisition System for High-Voltage Inputs with Lowest Distortion.

9.2.3 Application Curve

MUX506 MUX507 C030_SBOS705.png Figure 43. ADC 16-Bit Linearity Error for the Multiplexed Data-Acquisition Block