JAJSCO7A November   2016  – November 2017 MUX506 , MUX507

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Dual Supply
    6. 6.6 Electrical Characteristics: Single Supply
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  Truth Tables
    2. 7.2  On-Resistance
    3. 7.3  Off Leakage
    4. 7.4  On-Leakage Current
    5. 7.5  Transition Time
    6. 7.6  Break-Before-Make Delay
    7. 7.7  Turn-On and Turn-Off Time
    8. 7.8  Charge Injection
    9. 7.9  Off Isolation
    10. 7.10 Channel-to-Channel Crosstalk
    11. 7.11 Bandwidth
    12. 7.12 THD + Noise
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Ultralow Leakage Current
      2. 8.3.2 Ultralow Charge Injection
      3. 8.3.3 Bidirectional Operation
      4. 8.3.4 Rail-to-Rail Operation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

Figure 45 illustrates an example of a PCB layout with the MUX506IPW, and Figure 46 illustrates an example of a PCB layout with MUX507IPW.

Some key considerations are:

  1. Decouple the VDD and VSS pins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD and VSS supplies.
  2. Keep the input lines as short as possible. In case of the differential signal, make sure the A inputs and B inputs are as symmetric as possible.
  3. Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.
  4. Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

MUX506 MUX507 MUX506IPW_Layout_LASED9.gif Figure 45. MUX506IPW Layout Example
MUX506 MUX507 MUX507IPW_Layout_LASED9.gif Figure 46. MUX507IPW Layout Example