JAJSDY5E October 2017 – February 2020 OPA202 , OPA2202 , OPA4202
PRODUCTION DATA.
DESCRIPTION | FIGURE |
---|---|
Offset Voltage Production Distribution | Figure 1 |
Offset Voltage Drift Distribution From –40°C to +105°C | Figure 2 |
Input Bias Current Production Distribution | Figure 3 |
Input Offset Current Production Distribution | Figure 4 |
Offset Voltage vs Temperature | Figure 5 |
Offset Voltage vs Common-Mode Voltage | Figure 6 |
Offset Voltage vs Supply Voltage | Figure 7 |
Open-Loop Gain and Phase vs Frequency | Figure 8 |
Closed-Loop Gain vs Frequency | Figure 9 |
Input Bias Current vs Common-Mode Voltage | Figure 10 |
Input Bias Current and Offset vs Temperature | Figure 11 |
Output Voltage Swing vs Output Current | Figure 12 |
Output Voltage Swing vs Output Current (Sourcing) | Figure 13 |
Output Voltage Swing vs Output Current (Sinking) | Figure 14 |
CMRR and PSRR vs Frequency | Figure 15 |
CMRR vs Temperature | Figure 16 |
PSRR vs Temperature | Figure 17 |
0.1-Hz to 10-Hz Voltage Noise | Figure 18 |
Input Voltage Noise Spectral Density vs Frequency | Figure 19 |
THD+N Ratio vs Frequency | Figure 20 |
THD+N vs Output Amplitude | Figure 21 |
Quiescent Current vs Supply Voltage | Figure 22 |
Quiescent Current vs Temperature | Figure 23 |
Open-Loop Gain vs Temperature (10-kΩ) | Figure 24 |
Open-Loop Gain vs Output Voltage Swing to Supply | Figure 25, Figure 26 |
Open-Loop Output Impedance vs Frequency | Figure 27 |
Small-Signal Overshoot vs Capacitive Load (10-mV Step) | Figure 28 |
No Phase Reversal | Figure 29 |
Positive Overload Recovery | Figure 30 |
Negative Overload Recovery | Figure 31 |
Small-Signal Step Response (10-mV Step) | Figure 32, Figure 33 |
Large-Signal Step Response (10-V Step) | Figure 34, Figure 35 |
Settling Time (10-V Step) | Figure 36 |
Short-Circuit Current vs Temperature | Figure 37 |
Maximum Output Voltage vs Frequency | Figure 38 |
EMIRR vs Frequency | Figure 39 |