JAJSD63A June 2017 – June 2018 OPA180-Q1 , OPA2180-Q1
PRODUCTION DATA.
DESCRIPTION | FIGURE |
---|---|
IB and IOS vs Common-Mode Voltage | Figure 1 |
Input Bias Current vs Temperature | Figure 2 |
Output Voltage Swing vs Output Current (Maximum Supply) | Figure 3 |
CMRR vs Temperature | Figure 4 |
0.1-Hz to 10-Hz Noise | Figure 5 |
Input Voltage Noise Spectral Density vs Frequency | Figure 6 |
Open-Loop Gain and Phase vs Frequency | Figure 7 |
Open-Loop Gain vs Temperature | Figure 8 |
Open-Loop Output Impedance vs Frequency | Figure 9 |
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) | Figure 10, Figure 11 |
No Phase Reversal | Figure 12 |
Positive Overload Recovery | Figure 13 |
Negative Overload Recovery | Figure 14 |
Small-Signal Step Response (100 mV) | Figure 15, Figure 16 |
Large-Signal Step Response | Figure 17, Figure 18 |
Large-Signal Settling Time (10-V Positive Step) | Figure 19 |
Large-Signal Settling Time (10-V Negative Step) | Figure 20 |
Short-Circuit Current vs Temperature | Figure 21 |
Maximum Output Voltage vs Frequency | Figure 22 |
Channel Separation vs Frequency | Figure 23 |
EMIRR IN+ vs Frequency | Figure 24 |