JAJSRJ1A June   2011  – February 2024 OPA564-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Current Limit
        1. 7.3.1.1 Setting the Current Limit
      2. 7.3.2 Enable and Shutdown (E/S) Pin
      3. 7.3.3 Input Protection
      4. 7.3.4 Output Shutdown
      5. 7.3.5 Microcontroller Compatibility
      6. 7.3.6 Current Limit Flag
      7. 7.3.7 Thermal Protection
      8. 7.3.8 Junction Temperature Measurement Using TSENSE
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Configuration
      2. 8.1.2 Output-Stage Compensation
      3. 8.1.3 Output Protection
      4. 8.1.4 Power Dissipation and Safe Operating Area
    2. 8.2 Typical Applications
      1. 8.2.1 Improved Howland Current Pump
      2. 8.2.2 Programmable Power Supply
      3. 8.2.3 Powerline Communication
      4. 8.2.4 Motor-Drive Circuit
      5. 8.2.5 DC Motor-Speed Controller (Without Tachometer)
      6. 8.2.6 Generating VDIG
      7. 8.2.7 Temperature Measurement
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermally Enhanced PowerPAD™ Integrated Circuit Package
          1. 8.4.1.1.1 Bottom-Side Thermal Pad Assembly Process
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3 Power Supply Recommendations

The OPA564-Q1 operates with excellent performance from single (7V to 24V) or dual (±3.5V to ±12V) analog supplies and a digital supply of 3.3V to 5.5V (referenced to the V– pin). The analog power-supply voltages do not need to be symmetrical, as long as the total voltage remains less than 24V. For example, the positive supply can be set to 14V with the negative supply at –10V. Most behaviors remain constant across the operating voltage range. Section 6.6 shows the parameters that vary significantly with operating voltage.

To prevent damage to the OPA564-Q1, ensure that the digital supply voltage (VDIG) is applied before the supply voltage when sequencing power supplies. Figure 8-14 shows acceptable versus unacceptable power-supply sequencing.

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(1) The power-supply sequence illustrated in (A) is not allowed because this power-supply sequence damages the device.
Figure 8-14 Power-Supply Sequencing