JAJSS69B September   2000  – April 2024 OPA627 , OPA637

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: OPA627
    5. 5.5 Thermal Information: OPA637
    6. 5.6 Electrical Characteristics: OPA627BU, OPA627AU
    7. 5.7 Electrical Characteristics: OPA627AM, OPA627BM, OPA627SM
    8. 5.8 Electrical Characteristics: OPA637
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Voltage Adjustment
      2. 6.3.2 Noise Performance
      3. 6.3.3 Input Bias Current
      4. 6.3.4 Phase-Reversal Protection
      5. 6.3.5 Output Overload
      6. 6.3.6 Capacitive Loads
      7. 6.3.7 Input Protection
      8. 6.3.8 EMI Rejection Ratio (EMIRR)
        1. 6.3.8.1 EMIRR IN+ Test Configuration
      9. 6.3.9 Settling Time
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        2. 8.1.1.2 Analog Filter Designer
        3. 8.1.1.3 TI のリファレンス・デザイン
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Revision History

Changes from Revision A (April 2015) to Revision B (April 2024)

  • OPA627BU プレビュー デバイスおよび関連情報をデータシートに追加Go
  • データシート全体にわたって Difet の参照を削除Go
  • 「OPA627 の概略回路図」を「OPA627 ローパス フィルタ」に変更Go
  • データシートから P パッケージ (PDIP、8) を削除Go
  • 「概要」のテキストを更新Go
  • Updated pin configuration diagrams and functions tables in Pin Configuration and Functions Go
  • Changed signal input pin voltage common-mode from "(V–) – 2V to (V+) + 2V" to "(V–) – 0.5V to (V+) + 0.5V" and differential from total VS + 4 to (V+) – (V–) in Absolute Maximum Ratings Go
  • Added input pin current range row to Absolute Maximum Ratings Go
  • Updated OPA627AU ESD Ratings Go
  • Updated specified temperature range to fix typo in Recommended Operating Conditions Go
  • Updated OPA627AU Thermal Information Go
  • Updated Electrical Characteristics to individual tables.Go
  • Updated parameter abbreviations and names in all Electrial Characteristics Go
  • Added nominal conditions to the header of all Electrical Characteristics.Go
  • Added ± to input offset voltage, input offset voltage drift, input bias current, and input offset current values to all Electrical Characteristics Go
  • Changed OPA627AU input voltage noise from 0.8VPP to 0.34VPP Go
  • Updated OPA627AU input voltage noise density valuesGo
  • Changed OPA627AU common-mode input impedance from 7pF to 9pFGo
  • Changed OPA627AU gain-bandwidth product from 16MHz to 45MHzGo
  • Added OPA627AU capacitive load test condition to gain-bandwidth product and settling timeGo
  • Changed OPA627AU slew rate TYP value from 55V/µs to 150V/µs and deleted MIN valueGo
  • Changed OPA627AU settling time from 550ns to 120ns for 0.01%, and from 450ns to 110ns for 0.1%Go
  • Added OPA627AU THD+N VO test conditionGo
  • Changed OPA627AU current output from ±45 to ±30mAGo
  • Changed OPA627AU short-circuit current TYP value from ±70mA/–50mA to ±45mA and deleted MIN and MAX valuesGo
  • Changed OPA627AU open-loop output impedance from 55Ω to 13.5ΩGo
  • Updated Functional Block Diagram Go
  • Updated text in Offset Voltage Adjustment Go
  • Changed protection range from "+VS + 2V to –VS – 2V" to "+VS + 0.5V to –VS – 0.5V" in Input Protection Go
  • Updated Figure 6-8, OPA627 EMIRR IN+ vs Frequency, Table 6-1, OPA627 EMIRR IN+ Frequencies of Interest, and related description in EMI Rejection Ratio (EMIRR) Go
  • Deleted duplicate Figure 46; see Figure 6-4, Connection of Input Guard for Lower IB Go
  • Updated Figure 45, and moved to Figure 7-9 and Figure 7-10Go

Changes from Revision * (September 2000) to Revision A (April 2015)

  • 「ESD 定格」、「機能説明」、「デバイスの機能モード」、「アプリケーションと実装」、「電源に関する推奨事項」、「レイアウト」、「デバイスおよびドキュメントのサポート」、「メカニカル、パッケージ、および注文情報」の各セクションを追加 Go