JAJSHS6E August   2019  – August 2024 OPA810

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: 10 V
    6. 6.6  Electrical Characteristics: 24 V
    7. 6.7  Electrical Characteristics: 5 V
    8. 6.8  Typical Characteristics: VS = 10 V
    9. 6.9  Typical Characteristics: VS = 24 V
    10. 6.10 Typical Characteristics: VS = 5 V
    11. 6.11 Typical Characteristics: ±2.375-V to ±12-V Split Supply
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 OPA810 Architecture
      2. 7.3.2 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375 V to ±13.5 V)
      2. 7.4.2 Single-Supply Operation (4.75 V to 27 V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Gain Configurations
      2. 8.1.2 Selection of Feedback Resistors
      3. 8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 High-Z Input Data Acquisition Front-End
      3. 8.2.3 Multichannel Sensor Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • DBV|5
  • DCK|5
サーマルパッド・メカニカル・データ
発注情報

8.1.1 Amplifier Gain Configurations

The OPA810 is a classic voltage-feedback amplifier with each channel having two high-impedance inputs and a low-impedance output. Standard application circuits (as shown in Figure 8-1 and Figure 8-2) include the noninverting and inverting gain configurations. The DC operating point for each configuration is level-shifted by the reference voltage VREF that is typically set to midsupply in single-supply operation. VREF is often connected to ground in split-supply applications.

OPA810 Noninverting Amplifier Figure 8-1 Noninverting Amplifier
OPA810 Inverting Amplifier Figure 8-2 Inverting Amplifier

Equation 1 shows the closed-loop gain of an amplifier in a noninverting configuration.

Equation 1. OPA810

Equation 2 shows the closed-loop gain of an amplifier in an inverting configuration.

Equation 2. OPA810