JAJSC89A May   2016  – June 2016 OPT3002

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Automatic Full-Scale Range Setting
      2. 7.3.2 Interrupt Operation, INT Pin, and Interrupt Reporting Mechanisms
      3. 7.3.3 I2C Bus Overview
        1. 7.3.3.1 Serial Bus Address
        2. 7.3.3.2 Serial Interface
    4. 7.4 Device Functional Modes
      1. 7.4.1 Automatic Full-Scale Setting Mode
      2. 7.4.2 Interrupt Reporting Mechanism Modes
        1. 7.4.2.1 Latched Window-Style Comparison Mode
        2. 7.4.2.2 Transparent Hysteresis-Style Comparison Mode
        3. 7.4.2.3 End-of-Conversion Mode
        4. 7.4.2.4 End-of-Conversion and Transparent Hysteresis-Style Comparison Mode
    5. 7.5 Programming
      1. 7.5.1 Writing and Reading
        1. 7.5.1.1 High-Speed I2C Mode
        2. 7.5.1.2 General-Call Reset Command
        3. 7.5.1.3 SMBus Alert Response
    6. 7.6 Register Maps
      1. 7.6.1 Internal Registers
        1. 7.6.1.1 Register Descriptions
          1. 7.6.1.1.1 Result Register (address = 00h)
          2. 7.6.1.1.2 Configuration Register (address = 01h) [reset = C810h]
          3. 7.6.1.1.3 Low-Limit Register (address = 02h) [reset = C0000h]
          4. 7.6.1.1.4 High-Limit Register (address = 03h) [reset = BFFFh]
          5. 7.6.1.1.5 Manufacturer ID Register (address = 7Eh) [reset = 5449h]
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Electrical Interface
      2. 8.1.2 Optical Interface
      3. 8.1.3 Compensation for the Spectral Response
    2. 8.2 Do's and Don'ts
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 ハンダ付けと取り扱いについての推奨事項
    2. 12.2 DNP (S-PDSO-N6)メカニカル図面

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

The PCB layout design for the OPT3002 requires a couple of considerations. Bypass the power supply with a capacitor placed close to the OPT3002. Note that optically reflective surfaces of components also affect the performance of the design. The three-dimensional geometry of all components and structures around the sensor must be taken into consideration to prevent unexpected results from secondary optical reflections. Placing capacitors and components at a distance of at least twice the height of the component is usually sufficient. The most optimal optical layout is to place all close components on the opposite side of the PCB from the OPT3002. However, this approach may not be practical for the constraints of every design.

Electrically connecting the thermal pad to ground is recommended. This connection can be created either with a PCB trace or with vias to ground directly on the thermal pad itself. If the thermal pad contains vias, they are recommended to be of a small diameter (< 0.2 mm) to prevent them from wicking the solder away from the appropriate surfaces.

An example PCB layout with the OPT3002 is shown in Figure 24.

10.2 Layout Example

OPT3002 ai_layout_sbos745.gif Figure 24. Example PCB Layout with the OPT3002