JAJSOP2 December   2022 OPT3005

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Human Eye Matching
      2. 8.3.2 Automatic Full-Scale Range Setting
      3. 8.3.3 Interrupt Operation, INT Pin, and Interrupt Reporting Mechanisms
      4. 8.3.4 I2C Bus Overview
        1. 8.3.4.1 Serial Bus Address
        2. 8.3.4.2 Serial Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Automatic Full-Scale Setting Mode
      2. 8.4.2 Interrupt Reporting Mechanism Modes
        1. 8.4.2.1 Latched Window-Style Comparison Mode
        2. 8.4.2.2 Transparent Hysteresis-Style Comparison Mode
        3. 8.4.2.3 End-of-Conversion Mode
        4. 8.4.2.4 End-of-Conversion and Transparent Hysteresis-Style Comparison Mode
    5. 8.5 Programming
      1. 8.5.1 Writing and Reading
        1. 8.5.1.1 High-Speed I2C Mode
        2. 8.5.1.2 General-Call Reset Command
        3. 8.5.1.3 SMBus Alert Response
    6. 8.6 Register Maps
      1. 8.6.1 Internal Registers
        1. 8.6.1.1 Register Descriptions
          1. 8.6.1.1.1 Result Register (offset = 00h)
          2. 8.6.1.1.2 Configuration Register (offset = 01h) [reset = C810h]
          3. 8.6.1.1.3 Low-Limit Register (offset = 02h) [reset = C0000h]
          4. 8.6.1.1.4 High-Limit Register (offset = 03h) [reset = BFFFh]
          5. 8.6.1.1.5 Manufacturer ID Register (offset = 7Eh) [reset = 5449h]
          6. 8.6.1.1.6 Device ID Register (offset = 7Fh) [reset = 3001h]
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Electrical Interface
      2. 9.1.2 Optical Interface
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Optomechanical Design
        2. 9.2.2.2 Dark Window Selection and Compensation
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don'ts
    4. 9.4 Power-Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
      3. 9.5.3 Soldering and Handling Recommendations
      4. 9.5.4 Mechanical Drawings
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報
Result Register (offset = 00h)

This register contains the result of the most recent light to digital conversion. This 16-bit register has two fields: a 4-bit exponent and a 12-bit mantissa.

Figure 8-5 Result Register (Read-Only)
15141312111098
E3E2E1E0R11R10R9R8
RRRRRRRR
76543210
R7R6R5R4R3R2R1R0
RRRRRRRR
LEGEND: R = Read only
Table 8-7 Result Register Field Descriptions
BitFieldTypeResetDescription
15:12E[3:0]R0hExponent.
These bits are the exponent bits. Table 8-8 provides further details.
11:0R[11:0]R000hFractional result.
These bits are the result in straight binary coding (zero to full-scale).
Table 8-8 Full-Scale Range and LSB Size as a Function of Exponent Level
E3E2E1E0FULL-SCALE RANGE (lux)LSB SIZE (lux per LSB)
000081.900.02
0001163.800.04
0010327.600.08
0011655.200.16
01001310.400.32
01012620.800.64
01105241.601.28
011110483.202.56
100020966.405.12
100141932.8010.24
101083865.6020.48
1011167731.240.96

The formula to translate this register into lux is given in Equation 1:

Equation 1. lux = LSB_Size × R[11:0]

where:

Equation 2. LSB_Size = 0.02 × 2E[3:0]

LSB_Size can also be taken from Table 8-8. The complete lux equation is shown in Equation 3:

Equation 3. lux = 0.02 × (2E[3:0]) × R[11:0]

A series of result register output examples with the corresponding LSB weight and resulting lux are given in Table 8-9. Note that many combinations of exponents (E[3:0]) and fractional results (R[11:0]) can map onto the same lux result, as shown in the examples of Table 8-9.

Table 8-9 Examples of Decoding the Result Register into lux
RESULT REGISTER
(Bits 15:0, Binary)
EXPONENT
(E[3:0], Hex)
FRACTIONAL RESULT
(R[11:0], Hex)
LSB WEIGHT
(lux, Decimal)
RESULTING LUX (Decimal)
0000 0000 0000 0001b00h001h0.020.02
0000 1111 1111 1111b00hFFFh0.0281.9
0011 0100 0101 0110b03h456h0.16177.60
0111 1000 1001 1010b07h89Ah2.565637.12
1000 1000 0000 0000b08h800h5.1210485.76
1001 0100 0000 0000b09h400h10..2410485.76
1010 0010 0000 0000b0Ah200h20.4810485.76
1011 0001 0000 0000b0Bh100h40.9610485.76
1011 0000 0000 0001b0Bh001h40.9640.96
1011 1111 1111 1111b0BhFFFh40.96167731.2

Note that the exponent field can be disabled (set to zero) by enabling the exponent mask (configuration register, ME field = 1) and manually programming the full-scale range (configuration register, RN[3:0] < 1100b (0Ch)), allowing for simpler operation in a manually-programmed, full-scale mode. Calculating lux from the result register contents only requires multiplying the result register by the LSB weight (in lux) associated with the specific programmed full-scale range (see Table 8-8). See the Low-Limit Register for details.

See the configuration register conversion time field (CT, bit 11) description for more information on lux resolution as a function of conversion time.